6 resultados para miniaturization

em Greenwich Academic Literature Archive - UK


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Products manufactured by the electronics sector are having a major impact in telecommunications, transportation space applications, biomedical applications, consumer products, intelligent hand held devices, and of course,the computer. Demands from end-users in terms of greater product functionality, adoption of environmentally friendly materials, and further miniaturization continually pose several challenges to electronics companies. In the context of electronic product design and manufacture, virtual prototying software tools are allowing companies to dramatically reduce the number of phsysical prototypes and design iterations required in product development and hence reduce costs and time to market. This paper details of the trends in these technolgies and provides an example of their use for flip-chip assembly technology.

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The electronics industry and the problems associated with the cooling of microelectronic equipment are developing rapidly. Thermal engineers now find it necessary to consider the complex area of equipment cooling at some level. This continually growing industry also faces heightened pressure from consumers to provide electronic product miniaturization, which in itself increases the demand for accurate thermal management predictions to assure product reliability. Computational fluid dynamics (CFD) is considered a powerful and almost essential tool for the design, development and optimization of engineering applications. CFD is now widely used within the electronics packaging design community to thermally characterize the performance of both the electronic component and system environment. This paper discusses CFD results for a large variety of investigated turbulence models. Comparison against experimental data illustrates the predictive accuracy of currently used models and highlights the growing demand for greater mathematical modelling accuracy with regards to thermal characterization. Also a newly formulated low Reynolds number (i.e. transitional) turbulence model is proposed with emphasis on hybrid techniques.

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High current density induced damages such as electromigration in the on-chip interconnection /metallization of Al or Cu has been the subject of intense study over the last 40 years. Recently, because of the increasing trend of miniaturization of the electronic packaging that encloses the chip, electromigration as well as other high current density induced damages are becoming a growing concern for off-chip interconnection where low melting point solder joints are commonly used. Before long, a huge number of publications have been explored on the electromigration issue of solder joints. However, a wide spectrum of findings might confuse electronic companies/designers. Thus, a review of the high current induced damages in solder joints is timely right this moment. We have selected 6 major phenomena to review in this paper. They are (i) electromigration (mass transfer due electron bombardment), (ii) thermomigration (mass transfer due to thermal gradient), (iii) enhanced intermetallic compound growth, (iv) enhanced current crowding, (v) enhanced under bump metallisation dissolution and (vi) high Joule heating and (vii) solder melting. the damage mechanisms under high current stressing in the tiny solder joint, mentioned in the review article, are significant roadblocks to further miniaturization of electronics. Without through understanding of these failure mechanisms by experiments coupled with mathematical modeling work, further miniaturization in electronics will be jeopardized

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The trend towards miniaturization of electronic products leads to the need for very small sized solder joints. Therefore, there is a higher reliability risk that too large a fraction of solder joints will transform into Intermetallic Compounds (IMCs) at the solder interface. In this paper, fracture mechanics study of the IMC layer for SnPb and Pb-free solder joints was carried out using finite element numerical computer modelling method. It is assumed that only one crack is present in the IMC layer. Linear Elastic Fracture Mechanics (LEFM) approach is used for parametric study of the Stress Intensity Factors (SIF, KI and KII), at the predefined crack in the IMC layer of solder butt joint tensile sample. Contrary to intuition, it is revealed that a thicker IMC layer in fact increases the reliability of solder joint for a cracked IMC. Value of KI and KII are found to decrease with the location of the crack further away from the solder interfaces while other parameters are constant. Solder thickness and strain rate were also found to have a significant influence on the SIF values. It has been found that soft solder matrix generates non-uniform plastic deformation across the solder-IMC interface near the crack tip that is responsible to obtain higher KI and KII.

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The miniaturization and dissemination of audiovisual media into small, mobile assemblages of cameras, screens and microphones has brought "database cinema" (Manovich) into pockets and handbags. In turn, this micro-portability of video production calls for a reconsideration of database cinema, not as an aesthetic but rather as a media ecology that makes certain experiences and forms of interaction possible. In this context the clip and the fragment become a social currency (showing, trading online, etc.), and the enjoyment of a moment or "occasion" becomes an opportunity for recording, extending, preserving and displaying. If we are now the documentarists of our lives (as so many mobile phone adverts imply), it follows that we are also our own archivists as well. From the folksonomies of Flickr and YouTube to the slick "media centres" of Sony, Apple and Microsoft, the audiovisual home archive is a prized territory of struggle among platforms and brands. The database is emerging as the dominant (screen) medium of popular creativity and distribution – but it also brings the categories of "home" and "person" closer to that of the archive.

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Stencil printing of solder pastes is a critical stage in the SMT assembly process as a high proportion of the solder-related defects can be attributed to this stage. As the trend towards product miniaturization continues, there is a greater need for better understanding of the rheological behaviour and printing performance of new paste formulations. This fundamental understanding is crucial for achieving the repeatable solder paste deposits from board-to-board and pad-to-pad required for more reliable solder interconnections. The paper concerns a study on the effect of ageing on the rheological characteristics and printing performance of new lead-free solder pastes formulations used for flip-chip assembly applications. The objective is to correlate the rheological characteristics of aged paste samples to their printing performance. The methodology developed can be used for bench-marking new lead-free paste formulations in terms of shelf life, the potential deterioration in rheological characteristics and their printing performance.