Predicting the reliability of power electronic modules

This paper discusses the reliability of an IGBT power electronics module. This work is part of a major UK funded initiative into the design, packaging and reliability of power electronic modules. The predictive methodology combines numerical modeling techniques with experimentation and accelerated testing to identify failure modes and mechanisms for these type of power electronic module structures. The paper details results for solder joint failure substrate solder. Finite element method modeling techniques have been used to predict the stress and strain distribution within the module structures. Together with accelerated life testing, these results have provided a failure model for these joints which has been used to predict reliability of a rail traction application

Review of methods to predict solder joint reliability under thermo-mechanical cycling

Solder joints are often the cause of failure in electronic devices, failing due to cyclic creep induced ductile fatigue. This paper will review the modelling methods available to predict the lifetime of SnPb and SnAgCu solder joints under thermo-mechanical cycling conditions such as power cycling, accelerated thermal cycling and isothermal testing, the methods do not apply to other damage mechanisms such as vibration or drop-testing. Analytical methods such as recommended by the IPC are covered, which are simple to use but limited in capability. Finite element modelling methods are reviewed, along with the necessary constitutive laws and fatigue laws for solder, these offer the most accurate predictions at the current time. Research on state-of-the-art damage mechanics methods is also presented, although these have not undergone enough experimental validation to be recommended at present

Numerical modelling of solder joint formation

Solder materials are used to provide a connection between electronic components and printed circuit boards (PCBs) using either the reflow or wave soldering process. As a board assembly passes through a reflow furnace the solder (initially in the form of solder paste) melts, reflows, then solidifies, and finally deforms between the chip and board. A number of defects may occur during this process such as flux entrapment, void formation, and cracking of the joint, chip or board. These defects are a serious concern to industry, especially with trends towards increasing component miniaturisation and smaller pitch sizes. This paper presents a modelling methodology for predicting solder joint shape, solidification, and deformation (stress) during the assembly process.

A computational modelling framework to predict macroscopic phenomena in solder joint formation

A computational model of solder joint formation and the subsequent cooling behaviour is described. Given the rapid changes in the technology of printed circuit boards, there is a requirement for comprehensive models of solder joint formation which permit detailed analysis of design and optimization options. Solder joint formation is complex, involving a range of interacting phenomena. This paper describes a model implementation (as part of a more comprehensive framework) to describe the shape formation (conditioned by surface tension), heat transfer, phase change and the development of elastoviscoplastic stress. The computational modelling framework is based upon mixed finite element and finite volume procedures, and has unstructured meshes enabling arbitrarily complex geometries to be analysed. Initial results for both through-hole and surface-mount geometries are presented.

An integrated modeling approach to solder joint formation

The attachment of electronic components to printed circuit boards using solder material is a complex process. This paper presents a novel modeling methodology, which integrates the governing physics taking place. Multiphysics modeling technology, imbedded into the simulation tool—PHYSICA is used to simulate fluid flow, heat transfer, solidification, and stress evolution in an integrated manner. Results using this code are presented, detailing the mechanical response of two solder materials as they cool, solidify and then deform. The shape that a solder joint takes upon melting is predicted using the SURFACE EVOLVER code. Details are given on how these predictions can be used in the PHYSICA code to provide a modeling route by which the shape, solidification history, and resulting stress profiles can be predicted.

Modelling the performance of lead-Free solder interconnects for copper bumped flip-chip devices

Traditionally, before flip chips can be assembled the dies have to be attached with solder bumps. This process involves the deposition of metal layers on the Al pads on the dies and this is called the under bump metallurgy (UBM). In an alternative process, however, Copper (Cu) columns can be used to replace solder bumps and the UBM process may be omitted altogether. After the bumping process, the bumped dies can be assembled on to the printed circuit board (PCB) by using either solder or conductive adhesives. In this work, the reliability issues of flip chips with Cu column bumped dies have been studied. The flip chip lifetime associated with the solder fatigue failure has been modeled for a range of geometric parameters. The relative importance of these parameters is given and solder volume has been identified as the most important design parameter for long-term reliability. Another important problem that has been studied in this work is the dissolution of protection metals on the pad and Cu column in the reflow process. For small solder joints the amount of Cu which dissolves into the molten solder after the protection layers have worn out may significantly affect solder joint properties.

Modelling the metal arc weldpool

Traditionally, before flip chips can be assembled the dies have to be attached with solder bumps. This process involves the deposition of metal layers on the Al pads on the dies and this is called the under bump metallurgy (UBM). In an alternative process, however, Copper (Cu) columns can be used to replace solder bumps and the UBM process may be omitted altogether. After the bumping process, the bumped dies can be assembled on to the printed circuit board (PCB) by using either solder or conductive adhesives. In this work, the reliability issues of flip chips with Cu column bumped dies have been studied. The flip chip lifetime associated with the solder fatigue failure has been modeled for a range of geometric parameters. The relative importance of these parameters is given and solder volume has been identified as the most important design parameter for long-term reliability. Another important problem that has been studied in this work is the dissolution of protection metals on the pad and Cu column in the reflow process. For small solder joints the amount of Cu which dissolves into the molten solder after the protection layers have worn out may significantly affect solder joint properties.

Optimisation modelling for flip-chip solder joint reliability

This paper details and demonstrates integrated optimisation-reliability modelling for predicting the performance of solder joints in electronic packaging. This integrated modelling approach is used to identify efficiently and quickly the most suitable design parameters for solder joint performance during thermal cycling and is demonstrated on flip-chip components using “no-flow” underfills. To implement “optimisation in reliability” approach, the finite element simulation tool – PHYSICA, is coupled with optimisation and statistical tools. This resulting framework is capable of performing design optimisation procedures in an entirely automated and systematic manner.

No-flow underfill flip chip assembly–an experimental and modeling analysis

In the flip-chip assembly process, no-flow underfill materials have a particular advantage over traditional underfill: the application and curing of the former can be undertaken before and during the reflow process. This advantage can be exploited to increase the flip-chip manufacturing throughput. However, adopting a no-flow underfill process may introduce reliability issues such as underfill entrapment, delamination at interfaces between underfill and other materials, and lower solder joint fatigue life. This paper presents an analysis on the assembly and the reliability of flip-chips with no-flow underfill. The methodology adopted in the work is a combination of experimental and computer-modeling methods. Two types of no-flow underfill materials have been used for the flip chips. The samples have been inspected with X-ray and scanning acoustic microscope inspection systems to find voids and other defects. Eleven samples for each type of underfill material have been subjected to thermal shock test and the number of cycles to failure for these flip chips have been found. In the computer modeling part of the work, a comprehensive parametric study has provided details on the relationship between the material properties and reliability, and on how underfill entrapment may affect the thermal–mechanical fatigue life of flip chips with no-flow underfill.

Predicting the relationship between reliability and geometric parameters of cu column bumped flip-chips

Cu column bumping is a novel flip chip packaging technique that allows Cu columns to be bonded directly with the dies. It has eliminated the under-bump-metallurgy (UBM) fonnation step of the traditional flip chip manufacturing process. This bumping technique has the potential benefits of simplifying the flip chip manufacturing process, increasing productivity and the UO counts. In this paper, a study of reliability of Cu column bumped flip chips will be presented. Computer modelling methods have been used to predict the shape of solder joints and the response of flip chips to cyclic thermal-mechanical loading. The accumulated plastic strain energy at the corner solder joints has been used as an indicator of the solder joint reliability. Models with a wide range of design parameters have been compared for their reliability. The design parameters that have been investigated are the copper column height and radius, PCB pad radius, solder volume and Cu column wetting height. The relative importance ranking of these parameters has been obtained. The Lead-free solder material 96.5Sn3.5Ag has been used in this modelling work.

Identification and doing without it, V: A formal mathematical analysis for a case of mix-up of individuals, and of recovery from failure to attain identification

Identification, when sought, is not necessarily obtained. Operational guidance that is normatively acceptable may be necessary for such cases. We proceed to formalize and illustrate modes of exchanges of individual identity, and provide procedures of recovery strategies in specific prescriptions from an ancient body of law for such situations when, for given types of purposes, individuals of some relevant kind had become intermixed and were undistinguishable. Rules were devised, in a variety of domains, for coping with situations that occur if and when the goal of identification was frustrated. We propose or discuss mathematical representations of such recovery procedures.

The effect of thermal cycle profiles on solder joint damage

The relationship between the damage caused at different thermal cycles is very important. The whole of accelerated thermal cycle testing is based on the premise that damage at one cycle is representative of damage at a different cycle. In this paper, the relative damage caused by six thermal cycle profiles are predicted using Finite Element (FE) modelling and the results validated against experiments. Both creep strain and strain energy density were used as damage indicators and creep strain was found to correlate better with experiment. The validated FE model is then used to investigate the effect of altering each of the thermal profile parameters (ramp and swell times, hot and cold temperatures). The components used for testing are surface mount resistors - 1206, 0805 and 0603. The solders investigated are eutectic SnAgCu and eutectic SnAg.

Study of Anisotropic Conductive Adhesive Joint Behaviour under 3-Point Bending

Flip chip interconnections using anisotropic conductive film (ACF) are now a very attractive technique for electronic packaging assembly. Although ACF is environmentally friendly, many factors may influence the reliability of the final ACF joint. External mechanical loading is one of these factors. Finite element analysis (FEA) was carried out to understand the effect of mechanical loading on the ACF joint. A 3-dimensional model of adhesively bonded flip chip assembly was built and simulations were performed for the 3-point bending test. The results show that the stress at its highest value at the corners, where the chip and ACF were connected together. The ACF thickness was increased at these corner regions. It was found that higher mechanical loading results in higher stress that causes a greater gap between the chip and the substrate at the corner position. Experimental work was also carried out to study the electrical reliability of the ACF joint with the applied bending load. As per the prediction from FEA, it was found that at first the corner joint failed. Successive open joints from the corner towards the middle were also noticed with the increase of the applied load.

Moisture Effects on the Reliability of Anisotropic Conductive Films

Anisotropic conductive film (ACF) which consists of an adhesive epoxy matrix and randomly distributed conductive particles are widely used as the connection material for electronic devices with high I/O counts. However, for the semiconductor industry the reliability of the ACF is still a major concern due to a lack of experimental reliability data. This paper reports an investigation into the moisture effects on the reliability of ACF interconnections in the flip-chip-on-flex (FCOF) applications. A macro-micro 3D finite element modeling technique was used in order to make the multi-length-scale modeling of the ACF flip chip possible. The purposes of this modeling work was to understand the role that moisture plays in the failure of ACF flip chips, and to look into the influence of physical properties and geometric characteristics, such as the coefficient of the moisture expansion (CME), Young's modulus of the adhesive matrix and the bump height on the reliability of the ACF interconnections in a humid environment. Simulation results suggest that moisture-induced swelling of the adhesive matrix is the major cause of the ACF joint opening. Modeling results are consistent with the findings in the experimental work.

Use of a coupled mechanical-acoustic computational model to identify failure mechanisms in paper production

In this paper, a couple mechanical-acoustic system of equations is solved to determine the relationship between emitted sound and damage mechanisims in paper under controlled stress conditions. The simple classical expression describing the frequency of a plucked string to its material properties is used to generate a numberical representation of the microscopic structue of the paper, and the resulting numerical model is then used to simulate the vibration of a range of simple fibre structures when undergoing two distinct types of damange mechanisms: (a)fibre/fibre bond failure, (b) fibre failure. The numercial results are analysed to determine whether there is any detectable systematic difference between the resulting acoustic emissions of the two damage processes. Fourier techniques are then used to compare th computeed results against experimental measurements. Distinct frequency components identifying each type of damage are shown to exist, and in this respect theory and experiments show good correspondece. Hence, it is shown, that althrough the mathematical model represents a grossly-simplified view of the complex structure of the paper, it nevertheless provides a good understanding of the underlying micro-mechanisms characterising its proeperties as a stress-resisting structure. Use of the model and acoompanying software will enable operators to identify approaching failure conditions in the continuous production of paper from emitted sound signals and take preventative action.