Performance evaluation of the register insertion protocol for voice-data integration

The performance of the register insertion protocol for mixed voice-data traffic is investigated by simulation. The simulation model incorporates a common insertion buffer for station and ring packets. Bandwidth allocation is achieved by imposing a queue limit at each node. A simple priority scheme is introduced by allowing the queue limit to vary from node to node. This enables voice traffic to be given priority over data. The effect on performance of various operational and design parameters such as ratio of voice to data traffic, queue limit and voice packet size is investigated. Comparisons are made where possible with related work on other protocols proposed for voice-data integration. The main conclusions are: (a) there is a general degradation of performance as the ratio of voice traffic to data traffic increases, (b) substantial improvement in performance can be achieved by restricting the queue length at data nodes and (c) for a given ring utilisation, smaller voice packets result in lower delays for both voice and data traffic.

Performance evaluation of a distributed algorithm for an inverse heat conduction problem

Numerical solutions of realistic 2-D and 3-D inverse problems may require a very large amount of computation. A two-level concept on parallelism is often used to solve such problems. The primary level uses the problem partitioning concept which is a decomposition based on the mathematical/physical problem. The secondary level utilizes the widely used data partitioning concept. A theoretical performance model is built based on the two-level parallelism. The observed performance results obtained from a network of general purpose Sun Sparc stations are compared with the theoretical values. Restrictions of the theoretical model are also discussed.

A generic strategy for dynamic load balancing of distributed memory parallel computational mechanics using unstructured meshes

A large class of computational problems are characterised by frequent synchronisation, and computational requirements which change as a function of time. When such a problem is solved on a message passing multiprocessor machine [5], the combination of these characteristics leads to system performance which deteriorate in time. As the communication performance of parallel hardware steadily improves so load balance becomes a dominant factor in obtaining high parallel efficiency. Performance can be improved with periodic redistribution of computational load; however, redistribution can sometimes be very costly. We study the issue of deciding when to invoke a global load re-balancing mechanism. Such a decision policy must actively weigh the costs of remapping against the performance benefits, and should be general enough to apply automatically to a wide range of computations. This paper discusses a generic strategy for Dynamic Load Balancing (DLB) in unstructured mesh computational mechanics applications. The strategy is intended to handle varying levels of load changes throughout the run. The major issues involved in a generic dynamic load balancing scheme will be investigated together with techniques to automate the implementation of a dynamic load balancing mechanism within the Computer Aided Parallelisation Tools (CAPTools) environment, which is a semi-automatic tool for parallelisation of mesh based FORTRAN codes.