Effects of reflow process on the reliability of flip chip on flex interconnections using anisotropic conductive adhesives

In this paper, the effects of the solder reflow process on the reliability of anisotropic conductive film (ACF) interconnections for flip chip on flex (FCOF) applications are investigated. Experiments as well as computer modeling methods have been used. In the experiments, it was found that the contact resistance of ACF joints increased after the subsequent reflow process, and the magnitude of this increase was strongly correlated to the peak temperature of the reflow profile. Nearly 40% of the joints were opened (i.e. lifted away from the pad) after the reflow process with 260 °C peak temperature while no opening was observed when the peak temperature was 210 °C. It is believed that the CTE mismatch between the polymer particle and the adhesive matrix is the main cause of this contact degradation. It was also found that the ACF joints after the reflow process with 210 °C peak temperature showed a high ability to resist water absorption under steady state 85 °C/85%RH conditions, probably because the curing degree of the ACF was improved during the reflow process. To give a good understanding, a 3D model of an ACF joint structure was built and finite element analysis was used to predict the stress distribution in the conductive particles, adhesive matrix and metal pads during the reflow process.

Ultra-fine pitch flip-chip assembly using isotropic conductive adhesives

This paper discusses results from a highly interdisciplinary research project which investigated different packaging options for ultra-fine pitch, low temperature and low cost flip-chip assembly. Isotropic Conductive Adhesives (ICAs) are stencil printed to form the interconnects for the package. ICAs are utilized to ensure a low temperature assembly process of flip-chip copper column bumped packages. Results are presented on the structural integrity of novel electroformed stencils. ICA deposits at sub-100 micron pitch and the subsequent thermo-mechanical behaviour of the flip-chip ICA joints are analysed using numerical modelling techniques. Optimal design rules for enhanced performance and thermomechanical reliability of ICA assembled flip-chip packages are formulated.

Microwave cure of conductive adhesives for flip-chip & microsystems applications

The curing of conductive adhesives and underfills can save considerable time and offer cost benefits for the microsystems and electronics packaging industry. In contrast to conventional ovens, curing by microwave energy generates heat internally within each individual component of an assembly. The rate at which heat is generated is different for each of the components and depends on the material properties as well as the oven power and frequency. This leads to a very complex and transient thermal state, which is extremely difficult to measure experimentally. Conductive adhesives need to be raised to a minimum temperature to initiate the cross-linking of the resin polymers, whilst some advanced packaging materials currently under investigation impose a maximum temperature constraint to avoid damage. Thermal imagery equipment integrated with the microwave oven can offer some information on the thermal state but such data is based on the surface temperatures. This paper describes computational models that can simulate the internal temperatures within each component of an assembly including the critical region between the chip and substrate. The results obtained demonstrate that due to the small mass of adhesive used in the joints, the temperatures reached are highly dependent on the material properties of the adjacent chip and substrate.

Effects of solder reflow on the reliability of flip-chip on flex interconnections using anisotropic conductive adhesives

This work describes the work of an investigation of the effects of solder reflow process on the reliability of anisotropic conductive film (ACF) interconnection for flip-chip on flex (FCOF) applications. Experiments as well as computer modeling methods have been used. The results show that the contact resistance of ACF interconnections increases after the reflow and the magnitude of the increase is strongly correlated to the peak reflow temperature. In fact, nearly 40 percent of the joints are open when the peak reflow temperature is 260°C, while there is no opening when the peak temperature is 210°C. It is believed that the coefficient of thermal expansion (CTE) mismatch between the polymer particle and the adhesive matrix is the main cause of this contact degradation. To understand this phenomenon better, a three-dimensional (3-D) finite element (FE) model of an ACF joint has been analyzed in order to predict the stress distribution in the conductive particles, adhesive matrix and metal pads during the reflow process. The stress level at the interface between the particle and its surrounding materials is significant and it is the highest at the interface between the particle and the adhesive matrix.

Computational modelling for reliable flip-chip packaging at sub-100 micron pitch using isotropic conductive adhesives

This paper presents the assembly process using next generation electroformed stencils and Isotropic Conductive Adhesives (ICAs) as interconnection material. The utilisation of ICAs in flip-chip assembly process is investigated as an alternative to the lead and lead-free solder alloys and aims to ensure a low temperature (T < 100 °C) assembly process. The paper emphasizes and discusses in details the assembly of a flip-chip package based on copper columns bumped die and substrate with stencil printed ICA deposits at sub-100 μm pitch. A computational modelling approach is undertaken to provide comprehensive results on reliability trends of ICA joints subject to thermal cycling of the flip-chip assembly based on easy to use damage criteria and damage evaluation. Important design parameters in the package are selected and investigated using numerical modelling techniques to provide knowledge and understanding of their impact on the thermo-mechanical behaviour of the flip-chip ICA joints. Sensitivity analysis of the damage in the adhesive material is also carried out. Optimal design rules for enhanced performance and improved thermo-mechanical reliability of ICA assembled flip-chip packages are finally formulated.

Application of modelling for predicting the behaviour of polymers and adhesives in microelectronic and photonic devices

With the growth in computing power, and advances in numerical methods for the solution of partial differential equations, modeling technologies based around computational fluid dynamics, finite element analysis and optimisation are now being widely used by researchers and industry. Polymer and adhesive materials are now being widely used in electronic and photonic devices. This paper will illustrate the use of modeling tools to predict the behaviour of these materials from product assembly to its performance and reliability.

Investigation of wall-slip behaviour in lead-free solder pastes and isotropic conductive adhesives

Slippage due to wall depletion effect is well-known in rheological investigation. The aim of this study was to investigate the influence of the paste microstructure on slip formation for the paste materials (lead-free solder paste and isotropic conductive adhesives). The effect of different flowgeometries, gap heights and surface roughness on the paste viscosity was investigated. The utilisation of different measuring geometries has not clearly showed the presence of wall-slip in the paste samples. The existence of wall-slip was found to be pronounced when gap heights were varied using the parallel plate geometry. It was also found that altering the surface roughness of the parallel plate measuring geometry did not significantly eliminate wall-slip as expected. But results indicate that the use of a relatively rough surface helps to increase paste adhesion to the plates and to a certain extent inducing structural breakdown in the paste. Most importantly, the study also demonstrated on how the wall-slip formation in the paste material could be utilised for understanding of the paste microstructure and its flow behaviour.

Investigation of wall-slip effect on lead-free solder paste and isotropic conductive adhesives

Wall-slip plays an important role in characterising the flow behaviour of solder paste materials. The wall slip arises due to the various attractive and repulsive forces acting between the solder particles and the walls of the measuring geometry.These interactions could lead to the presence of a thin solvent layer adjacent to the wall, which gives rise to slippage. The wall slip effect can play an important role in ensure successfulpaste release after the printing process. Wall-slip plays animportant role in characterising the flow behaviour of solderpastes and isotropic conductive adhesives. The study investigates the wall-slip formation in solder paste andisotropic conductive adhesives using flow visualisation technique. The slip distance was measured for parallel plate with different surface roughness in order to quantify the wallslip formations in these paste materials. An ink marker line was drawn between the parallel plate and the free surface of the sample. The parallel was rotated slowly at a constant shear rate of 0.05 sec-1 and the displacement of the ink marker was observed using a video microscope and image capturing software was utilised to capture the displacement of ink marker. From this study, it was found that the wall-slip effect was evident in all the paste materials. In addition, the different surface roughness of the parallel plates did not prevent the formation of wall-slip. This study has revealed that the wallslip effect could used to understand the flow behaviour of the paste in the stencil printing process.

Rheological characterisation of solder pastes and isotropic conductive adhesives used for flip-chip assembly

Solder pastes and isotropic conductive adhesives (ICAs) are widely used as a principal bonding medium in the electronic industry. This study investigates the rheological behaviour of the pastes (solder paste and isotropic conductive adhesives) used for flip-chip assembly. Oscillatory stress sweep test are performed to evaluate solid characteristic and cohesiveness of the lead-free solder pastes and isotropic conductive adhesive paste materials. The results show that the G' (storage modulus) is higher than G '' (loss modulus) for the pastes material indicating a solid like behaviour. It result shows that the linear visco-elastic region for the pastes lies in a very small stress range, below 10 Pa. in addition, the stress at which the value of storage modulus is equal to that of loss modulus can be used as an indicator of the paste cohesiveness. The measured cross-over stress at G'=G '' shows that the solder paste has higher stress at G'=G '' compared to conductive adhesives. Creep-recovery test method is used to study the slump behaviour in the paste materials. The conductive adhesive paste shows a good recovery when compared to the solder pastes. (C) 2008 Elsevier B.V. All rights reserved.

Viscoelastic properties of solder paste and isotropic conductive adhesives used for flip-chip assembly

The printing of pastes (solder pastes and isotropic conductive adhesives) through very small stencil apertures required for flip-chip pitch sizes is expected to result in increased stencil clogging and incomplete transfer of paste to the printed circuit board pads. There is wide agreement in industry that the paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters on printing performance.

Modelling the performance of lead-Free solder interconnects for copper bumped flip-chip devices

Traditionally, before flip chips can be assembled the dies have to be attached with solder bumps. This process involves the deposition of metal layers on the Al pads on the dies and this is called the under bump metallurgy (UBM). In an alternative process, however, Copper (Cu) columns can be used to replace solder bumps and the UBM process may be omitted altogether. After the bumping process, the bumped dies can be assembled on to the printed circuit board (PCB) by using either solder or conductive adhesives. In this work, the reliability issues of flip chips with Cu column bumped dies have been studied. The flip chip lifetime associated with the solder fatigue failure has been modeled for a range of geometric parameters. The relative importance of these parameters is given and solder volume has been identified as the most important design parameter for long-term reliability. Another important problem that has been studied in this work is the dissolution of protection metals on the pad and Cu column in the reflow process. For small solder joints the amount of Cu which dissolves into the molten solder after the protection layers have worn out may significantly affect solder joint properties.

Modelling the metal arc weldpool

Traditionally, before flip chips can be assembled the dies have to be attached with solder bumps. This process involves the deposition of metal layers on the Al pads on the dies and this is called the under bump metallurgy (UBM). In an alternative process, however, Copper (Cu) columns can be used to replace solder bumps and the UBM process may be omitted altogether. After the bumping process, the bumped dies can be assembled on to the printed circuit board (PCB) by using either solder or conductive adhesives. In this work, the reliability issues of flip chips with Cu column bumped dies have been studied. The flip chip lifetime associated with the solder fatigue failure has been modeled for a range of geometric parameters. The relative importance of these parameters is given and solder volume has been identified as the most important design parameter for long-term reliability. Another important problem that has been studied in this work is the dissolution of protection metals on the pad and Cu column in the reflow process. For small solder joints the amount of Cu which dissolves into the molten solder after the protection layers have worn out may significantly affect solder joint properties.

Stencil printing at sub-100 microns pitch

This article presents the latest print results at less than 100 microns pitch obtained in stencil printing type 6 and 7 lead-free solder pastes and conductive adhesives. The advantages of the microengineered stencil arc presented and compared with other bonding technologies. Characterisation of the print deposits is presented and future applications of stencil printing are described.

Stencil printing at sub-100 microns pitch

This article presents the latest print results at less than 100 microns pitch obtained in stencil printing type 6 and 7 leadfree solder pastes and conductive adhesives. The advantages of the microengineered stencil are presented and compared with other bonding technologies. Characterisation of the print deposits is presented and future applications of stencil printing are described.

Macro-Micro Modelling Analysis for High Density Packaged Flip Chips

A wide range of flip chip technologies with solder or adhesives have become dominant solutions for high density packaging applications due to the excellent electrical performance, high I/O density and good thermal performance. This paper discusses the use of modeling technique to predict the reliability of high density packaged flip chips in the humid environment. Reliability assessment is discussed for flip chip package at ultra-fine pitch with anisotropic conductive film (ACF). The purpose of this modeling work is to understand the role that moisture plays in the failure of ACF flip chips. A macro-micro 3D finite element modeling technique was used in order to make the multi-length-scale modeling of the ACF flip chip possible. Modeling results are consistent with the findings in the experimental work