8 resultados para Thin cell layer

em Greenwich Academic Literature Archive - UK


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Wall-slip plays an important role in the flow behaviour of solder paste materials. The wall-slip arises due to the various attractive and repulsive forces acting between the solder particles and the walls of the measuring geometry. These interactions could lead to the presence of a thin liquid layer adjacent to the wall, which causes slippage. The aim of this study is to investigate the influence of the solder paste formulation on wall-slip formation and its effect on the printability of these pastes material. A wall slip model is utilised to calculate the true viscosity and slip velocity for the lead-free solder pastes samples used in this study. The difference in the measured viscosity and the true viscosity could indicate wall-slip formation between the solder pastes and the parallel plate. Sample P1 showed a higher slip velocity compared to sample P2. The slip velocity calculated for the solder pastes could be used as a performance indicator to understand the paste release characteristics in the stencil printing process.

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Wall-slip plays an important role in characterising the flow behaviour of solder paste materials. The wall slip arises due to the various attractive and repulsive forces acting between the solder particles and the walls of the measuring geometry.These interactions could lead to the presence of a thin solvent layer adjacent to the wall, which gives rise to slippage. The wall slip effect can play an important role in ensure successfulpaste release after the printing process. Wall-slip plays animportant role in characterising the flow behaviour of solderpastes and isotropic conductive adhesives. The study investigates the wall-slip formation in solder paste andisotropic conductive adhesives using flow visualisation technique. The slip distance was measured for parallel plate with different surface roughness in order to quantify the wallslip formations in these paste materials. An ink marker line was drawn between the parallel plate and the free surface of the sample. The parallel was rotated slowly at a constant shear rate of 0.05 sec-1 and the displacement of the ink marker was observed using a video microscope and image capturing software was utilised to capture the displacement of ink marker. From this study, it was found that the wall-slip effect was evident in all the paste materials. In addition, the different surface roughness of the parallel plates did not prevent the formation of wall-slip. This study has revealed that the wallslip effect could used to understand the flow behaviour of the paste in the stencil printing process.

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Solder paste is the most important strategic bonding material used in the assembly of surface mount components in electronics manufacturing. As the trend towards miniaturisation of electronic products continues, there is an increasing demand for better understanding of the flow and deformation that is, the rheological behaviour of solder paste formulations. Wall slip plays an important role in characterising the flow behaviour of solder paste materials. The problem of wall slip arises due to the various attractive and repulsive forces acting between the solder particles and the walls of the measuring geometry. These interactions could lead to the presence of a thin solvent layer adjacent to the wall, which gives rise to slippage. In rheological measurements, slip effects can generally be avoided by using roughened surfaces for measuring geometries. In this paper, a novel technique is developed to study the effect of wall slip in the rheological measurements of lead-free solder paste. The viscosity and oscillatory data obtained for three different solder paste samples (from measuring geometries of different surface roughness) havebeen analysed and compared. In viscosity measurements, slip effects were dominant at low shear rates and the use of serrated surfaces was found to be quite effective in minimizing slip effects. Oscillatory measurements were also affected by roughening the surfaces of measuring geometries.

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As the trend toward further miniaturisation of pocket and handheld consumer electronic products continues apace, the requirements for even smaller solder joints will continue. With further reductions in the size of solder joints, the reliability of solder joints will become more and more critical to the long-term performance of electronic products. Solder joints play an important role in electronics packaging, serving both as electrical interconnections between the components and the board, and as mechanical support for components. With world-wide legislation for the removal/reduction of lead and other hazardous materials from electrical and electronic products, the electronics manufacturing industry has been faced with an urgent search for new lead-free solder alloy systems and other solder alternatives. In order to achieve high volume, low cost production, the stencil printing process and subsequent wafer bumping of solder paste has become indispensable. There is wide agreement in industry that the paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters on printing performance. The printing of ICAs and lead-free solder pastes through the very small stencil apertures required for flip chip applications was expected to result in increased stencil clogging and incomplete transfer of paste to the printed circuit pads. Paste release from the stencil apertures is dependent on the interaction between the solder paste, surface pad and aperture wall; including its shape. At these very narrow aperture sizes the paste rheology becomes crucial for consistent paste withdrawal because for smaller paste volumes surface tension effects become dominant over viscous flow. Successful aperture filling and release will greatly depend on the rheology of the paste material. Wall-slip plays an important role in characterising the flow behaviour of solder paste materials. The wall- slip arises due to the various attractive and repulsive forces acting between the solder particles and the walls of the measuring geometry. These interactions could lead to the presence of a thin solvent layer adjacent to the wall, which gives rise to slippage. The wall slip effect can play an important role in ensuring successful paste release after the printing process. The aim of this study was to investigate the influence of the paste microstructure on slip formation for the paste materials (lead-free solder paste and isotropic conductive adhesives). The effect of surface roughness on the paste viscosity was investigated. It was also found that altering the surface roughness of the parallel plate measuring geometry did not significantly eliminate wall slip as was expected. But results indicate that the use of a relatively rough surface helps to increase paste adhesion to the plates, inducing structural breakdown of the paste. Most importantly, the study also demonstrated on how the wall slip formation in the paste material could be utilised for understanding of the paste microstructure and its flow behaviour

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The Computer Aided Parallelisation Tools (CAPTools) [Ierotheou, C, Johnson SP, Cross M, Leggett PF, Computer aided parallelisation tools (CAPTools)-conceptual overview and performance on the parallelisation of structured mesh codes, Parallel Computing, 1996;22:163±195] is a set of interactive tools aimed to provide automatic parallelisation of serial FORTRAN Computational Mechanics (CM) programs. CAPTools analyses the user's serial code and then through stages of array partitioning, mask and communication calculation, generates parallel SPMD (Single Program Multiple Data) messages passing FORTRAN. The parallel code generated by CAPTools contains calls to a collection of routines that form the CAPTools communications Library (CAPLib). The library provides a portable layer and user friendly abstraction over the underlying parallel environment. CAPLib contains optimised message passing routines for data exchange between parallel processes and other utility routines for parallel execution control, initialisation and debugging. By compiling and linking with different implementations of the library, the user is able to run on many different parallel environments. Even with today's parallel systems the concept of a single version of a parallel application code is more of an aspiration than a reality. However for CM codes the data partitioning SPMD paradigm requires a relatively small set of message-passing communication calls. This set can be implemented as an intermediate `thin layer' library of message-passing calls that enables the parallel code (especially that generated automatically by a parallelisation tool such as CAPTools) to be as generic as possible. CAPLib is just such a `thin layer' message passing library that supports parallel CM codes, by mapping generic calls onto machine specific libraries (such as CRAY SHMEM) and portable general purpose libraries (such as PVM an MPI). This paper describe CAPLib together with its three perceived advantages over other routes: - as a high level abstraction, it is both easy to understand (especially when generated automatically by tools) and to implement by hand, for the CM community (who are not generally parallel computing specialists); - the one parallel version of the application code is truly generic and portable; - the parallel application can readily utilise whatever message passing libraries on a given machine yield optimum performance.

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An electrolytic cell for Aluminium production contains molten metal and molten electrolyte, which are subject to high dc-currents and magnetic fields. Lorentz forces arising from the cross product of current and magnetic field may amplify natural gravity waves at the interface between the two fluids, leading to short circuits in extreme cases. The external magnetic field and current distribution in the production cell is computed through a detailed finite element analysis at Torino Polytechnic. The results are then used to compute the magnetohydrodynamic and thermal effects in the aluminium/electrolyte bath. Each cell has lateral dimensions of 6m x 2m, whilst the bath depth is only 30cm. the electrically resistive electrolyte path, which is critical in the operation of the cell, has layer depth of only a few centimetres below each carbon anode. Because the shallow dimensions of the liquid layer a finite-volume shallow-layer technique has been used at Greenwich to compute the resulting flow-field and interface perturbations. The information obtained from this method, i.e. depth averaged velocities and aluminium/electrolyte interface position is then embedded in the three-dimensional finite volume code PHYSICA and will be used to compute the heat transfer and phase change in the cell.

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Copper (Cu) has been widely used in the under bump metallurgy of chip and substrate metallization for chip packaging. However, due to the rapid formation of Cu–Sn intermetallic compound (IMC) at the tin-based solder/Cu interface during solder reaction, the reliability of this type of solder joint is a serious concern. In this work, electroless nickel–phosphorous (Ni–P) layer was deposited on the Cu pad of the flexible substrate as a diffusion barrier between Cu and the solder materials. The deposition was carried out in a commercial acidic sodium hypophosphite bath at 85 °C for different pH values. It was found that for the same deposition time period, higher pH bath composition (mild acidic) yields thicker Ni–P layer with lower phosphorous content. Solder balls having composition 62%Sn–36%Pb–2%Ag were reflowed at 240 °C for 1 to 180 min on three types of electroless Ni–P layers deposited at the pH value of 4, 4.8 and 6, respectively. Thermal stability of the electroless Ni–P barrier layer against the Sn–36%Pb–2%Ag solder reflowed for different time periods was examined by scanning electron microscopy equipped with energy dispersed X-ray. Solder ball shear test was performed in order to find out the relationship between the mechanical strength of solder joints and the characteristics of the electroless Ni–P layer deposited. The layer deposited in the pH 4 acidic bath showed the weak barrier against reflow soldering whereas layer deposited in pH 6 acidic bath showed better barrier against reflow soldering. Mechanical strength of the joints were deteriorated quickly in the layer deposited at pH 4 acidic bath, which was found to be thin and has a high phosphorous content. From the cross-sectional studies and fracture surface analyses, it was found that the appearance of the dark crystalline phosphorous-rich Ni layer weakened the interface and hence lower solder ball shear strength. Ni–Sn IMC formed at the interfaces was found to be more stable at the low phosphorous content (∼14 at.%) layer. Electroless Ni–P deposited at mild acidic bath resulting phosphorous content of around 14 at.% is suggested as the best barrier layer for Sn–36%Pb–2%Ag solder.

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The Knoevenagel condensation of 1,3-dihydro-2H-indol-2-one with ferrocene carboxaldehyde afforded an approximate 2:1 mixture of the geometrical isomers (E)- and (Z)-3-ferrocenylmethylidene-1,3-dihydro-2H-indol-2-one respectively in an overall 67% yield; the air and solution-stable isomers were readily separated by preparative thin layer chromatography and their structures were unequivocally elucidated in solution, by (1)H NMR spectroscopy, and in the solid phase, by X-ray crystallography; both isomers of displayed in vitro toxicity against B16 melanoma and Vero cell lines in the micromolar range and inhibited the kinase VEGFR-2 with IC(50) values of ca. 200 nM.