Material properties, geometry and their effect on the fatigue life of two flip-chip models

This paper describes how modeling technology has been used in providing fatigue life time data of two flip-chip models. Full-scale three-dimensional modeling of flip-chips under cyclic thermal loading has been combined with solder joint stand-off height prediction to analyze the stress and strain conditions in the two models. The Coffin-Manson empirical relationship is employed to predict the fatigue life times of the solder interconnects. In order to help designers in selecting the underfill material and the printed circuit board, the Young's modulus and the coefficient of thermal expansion of the underfill, as well as the thickness of the printed circuit boards are treated as variable parameters. Fatigue life times are therefore calculated over a range of these material and geometry parameters. In this paper we will also describe how the use of micro-via technology may affect fatigue life

Modelling the Performance of Flexible Substrates for Lead-Free Applications

In this paper, the performance of flexible substrates for lead-free applications was studied using finite element method (FEM). Firstly, the thermal induced stress in the flex substrate during the lead free solder reflow process was predicted. The shear stress at the interface between the copper track and flex was plotted. This shear stress increases with the thickness of the copper track. Secondly, an ACF flip chip was taken as a typical lead-free application of the flex substrate. The reflow effect on the reliability of ACF interconnections was analyzed. Higher stress was identified along the interface between the conductive particle and the metallization, and the interfacial stress increases with the reflow peak temperature and the coefficient of thermal expansion (CTE) of the adhesive. The moisture effect on the reliability of ACF joints were studied using a macro-micro modeling technique, the predominantly tensile stress found at the interface between the conductive particle and metallization could reduce the contact area and even cause the electrical failure. Modeling results are consistent with the findings in the experimental work

Modelling the behavior of solder joints for wafer level SiP

Design for manufacture of system-in-package (SiP) structures is dependent on a number of physical processes that affect the final quality of the package in terms of its performance and reliability. Solder joints are key structures in a SiP and their behavior can be the critical factor in terms of reliability. This paper discusses the results from a research programme on design for manufacturing of system in package (SiP) technologies. The focus of the paper is on thermo-mechanical modelling of solder joints. This includes the behavior of the joints during testing plus some important insights into the reflow process and how physical phenomena taking place at the assembly stage can affect solder joint behavior. Finite element analysis of a numerical model of an SiP structure with various design parameters is discussed. The goal of this analysis is to identify the most promising combination of design parameters which guarantee longer lifetime of the solder joints and hence the SiP component. The parameters that were studied are the size of the package (i.e. number of solder joints per row), the presence of the underfill and/or the reinforcement as well as the thickness of the passive die. Discussion was also provided on phenomena that take place during the reflow process where the solder joints are formed. In particular, the formation of intermetallics at the solder-pad interfaces

Analyzing the performance of flexible substrates for lead-free applications

The performance of flexible substrates for lead-free applications was studied using finite element method (FEM). Firstly, the thermal induced stress in the flex substrate during the lead free solder reflow process was predicted. The shear stress at the interface between the copper track and flex was plotted. This shear stress increases with the thickness of the copper track and the thickness of the flex. Secondly, an anisotropic conductive film (ACF) flip chip was taken as a typical lead-free application of the flex substrate and the moisture effect on the reliability of ACF joints were studied using a 3D macro-micro modeling technique. It is found that the time to be saturated of an ACF flip chip is much dependent on the moisture diffusion rate in the polyimide substrate. The majority moisture diffuses into the ACF layer from the substrate side rather than the periphery of the ACF. The moisture induced stress was predicted and the predominant tensile stress was found at the interface between the conductive particle and metallization which could reduce the contact area and even cause the electrical failure

Effect of adding 0.3wt% Ni into the Sn-0.7wt% Cu solder - Part II: Growth of intermetallic layer with Cu during wetting and aging

The growth behavior of intermetallic layer with or without adding 0.3 wt% Ni into the Sn-0.7Cu solder was studied during the wetting reaction on Cu-substrate and thereafter in solid-state aging condition. The Cu-solder reaction couple was prepared at 255, 275 and 295 °C for 10 s. The samples reacted at 255 °C were then isothermally aged for 2-14 days at 150 °C. The reaction species formed for the Sn-0.7Cu/Cu and Sn-0.7Cu-0.3Ni/Cu soldering systems were Cu6Sn5 and (CuNi)6Sn5, respectively. The thickness of the intermetallic compounds formed at the solder/Cu interfaces and also in the bulk of both solders increased with the increase of reaction temperature. It was found that Ni-containing Sn-0.7Cu solder exhibited lower growth of intermetallic layer during wetting and in the early stage of aging and eventually exceeded the intermetallic layer thickness of Sn-0.7Cu/Cu soldering system after 6 days of aging. As the aging time proceeds, a non-uniform intermetallic layer growth tendency was observed for the case of Sn-0.7Cu-0.3Ni solder. The growth behavior of intermetallic layer during aging for both solders followed the diffusion-controlled mechanism. The intermetallic layer growth rate constants for Sn-0.7Cu and Sn-0.7Cu-0.3Ni solders were calculated as 1.41 × 10-17 and 1.89 × 10-17 m2/s, respectively which indicated that adding 0.3 wt% Ni with Sn-0.7Cu solder contributed to the higher growth of intermetallic layer during aging. © 2006 Elsevier B.V. All rights reserved.