26 resultados para RELIABILITY ANALYSIS

em Greenwich Academic Literature Archive - UK


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A flip chip component is a silicon chip mounted to a substrate with the active area facing the substrate. This paper presents the results of an investigation into the relationship between a number of important material properties and geometric parameters on the thermal-mechanical fatigue reliability of a standard flip chip design and a flip chip design with the use of microvias. Computer modeling has been used to analyze the mechanical conditions of flip chips under cyclic thermal loading where the Coffin-Manson empirical relationship has been used to predict the life time of the solder interconnects. The material properties and geometry parameters that have been investigated are the Young's modulus, the coefficient of thermal expansion (CTE) of the underfill, the out-of-plane CTE (CTEz) of the substrate, the thickness of the substrate, and the standoff height. When these parameters vary, the predicted life-times are calculated and some of the features of the results are explained. By comparing the predicted lifetimes of the two designs and the strain conditions under thermal loading, the local CTE mismatch has been found to be one of most important factors in defining the reliability of flip chips with microvias.

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This paper discusses the reliability of power electronics modules. The approach taken combines numerical modeling techniques with experimentation and accelerated testing to identify failure modes and mechanisms for the power module structure and most importantly the root cause of a potential failure. The paper details results for two types of failure (i) wire bond fatigue and (ii) substrate delamination. Finite element method modeling techniques have been used to predict the stress distribution within the module structures. A response surface optimisation approach has been employed to enable the optimal design and parameter sensitivity to be determined. The response surface is used by a Monte Carlo method to determine the effects of uncertainty in the design.

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This presentation discusses latest developments in SiP technology and the challenges for design in terms of manufacture and reliability. It presents results from a UK government funded project that aims to develop modelling techniques that will assess the thermo-mechanical reliability of SiP structures such as (i) stacked die, (ii) side-by-side dies and (iii) embedded die. Finite element analysis coupled with numerical optimisation and uncertainty analysis is used is used to model the reliability of a particular package design. In particular, the damage (energy density) in the lead free solder interconnects under accelerated temperature cycling is predicted and used to observe the fatigue life-time. Warpage of the structure is also investigated

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Power electronic modules distinguish themselves from other modules by their high power operation. These modules are used extensively in high power application markets such as aerospace, automotive, industrial and traction and drives. This paper discusses typical packaging technologies for power electronics modules. It also discusses the latest results from a UK research project investigating the physics-of-failure approach to reliability analysis and predictions for power modules. An integrated design enviroment for incorporating of affects of uncertainty into the design environment was outlined.

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In this paper, a method for the integration of several numerical analytical techniques that are used in microsystems design and failure analysis is presented. The analytical techniques are categorized into four groups in the discussion, namely the high-fidelity analytical tools, i.e. finite element (FE) method, the fast analytical tools referring to reduced order modeling (ROM); the optimization tools, and probability based analytical tools. The characteristics of these four tools are investigated. The interactions between the four tools are discussed and a methodology for the coupling of these four tools is offered. This methodology consists of three stages, namely reduced order modeling, deterministic optimization and probabilistic optimization. Using this methodology, a case study for optimization of a solder joint is conducted. It is shown that these analysis techniques have mutual relationship of interaction and complementation. Synthetic application of these techniques can fully utilize the advantages of these techniques and satisfy various design requirements. The case study shows that the coupling method of different tools provided by this paper is effective and efficient and it is highly relevant in the design and reliability analysis of microsystems

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Experiments as well as computer modeling methods have been used to investigate the effect of the solder reflow process on the electrical characteristics and reliability of anisotropic conductive film (ACF) interconnections. In the experiments, the contact resistance of the ACF interconnections was found to increase after a subsequent reflow and the magnitude of this increase was strongly correlated to the peak temperature of the reflow profile. In fact, nearly 40 percent of the joints were opened (i.e. lifted away from the pad) after the reflow with a peak temperature of 260 OC while no openings was observed when the peak temperature was 210 "C. It is believed that the CTE mismatch between the polymer particle and the adhesive matrix is the main cause of this contact degradation. To understand this phenomenon better, a 3-D model of an ACF joint structure was built and Finite Element Analysis was used to predict the stress distrihution in the conductive particles, adhesive matrix and metal pads during the reflow process. The effects of the peak temperature, the CTE of the adhesive matrix and the bump height on the reliability of the ACF interconnections were discussed.

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A hotly debated issue in the area of aviation safety is the number of cabin crew members required to evacuate an aircraft in the event of an emergency. Most countries regulate the minimum number required for the safe operation of an aircraft, but these rulings are based on little if any scientific evidence. Another issue of concern is the failure rate of exits and slides. This paper examines these issues using the latest version of Aircraft Accident Statistics and Knowledge database AASK V4.0, which contains information from 105 survivable crashes and more than 2,000 survivors, including accounts from 155 cabin crew members.

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In power electronics modules, heavy aluminium wires, i.e. wire diameters greater than 100 microns, are bonded to the active semiconductor devices and conductor metallization to form electric circuits of the power electronic module. Due to the high currents that may flow through these wires, a single connection usually contains several wires and thus, a large number of wires are used in a power electronics module. Under normal operation or test condition, a significant amount of stresses and strains induced in the wire and bonding interfaces, resulting in failure over time. In this paper, computer modelling techniques are used to analyse the effect of globtop design on the reliability of aluminium wirebonds under cyclic thermal-mechanical loading conditions. The results will show the sensitivity of the reliability of the wirebonds to the changes in the geometry and the material properties of the wirebond globtop.

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This paper demonstrates a modeling and design approach that couples computational mechanics techniques with numerical optimisation and statistical models for virtual prototyping and testing in different application areas concerning reliability of eletronic packages. The integrated software modules provide a design engineer in the electronic manufacturing sector with fast design and process solutions by optimizing key parameters and taking into account complexity of certain operational conditions. The integrated modeling framework is obtained by coupling the multi-phsyics finite element framework - PHYSICA - with the numerical optimisation tool - VisualDOC into a fully automated design tool for solutions of electronic packaging problems. Response Surface Modeling Methodolgy and Design of Experiments statistical tools plus numerical optimisaiton techniques are demonstrated as a part of the modeling framework. Two different problems are discussed and solved using the integrated numerical FEM-Optimisation tool. First, an example of thermal management of an electronic package on a board is illustrated. Location of the device is optimized to ensure reduced junction temperature and stress in the die subject to certain cooling air profile and other heat dissipating active components. In the second example thermo-mechanical simulations of solder creep deformations are presented to predict flip-chip reliability and subsequently used to optimise the life-time of solder interconnects under thermal cycling.

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In the flip-chip assembly process, no-flow underfill materials have a particular advantage over traditional underfill: the application and curing of the former can be undertaken before and during the reflow process. This advantage can be exploited to increase the flip-chip manufacturing throughput. However, adopting a no-flow underfill process may introduce reliability issues such as underfill entrapment, delamination at interfaces between underfill and other materials, and lower solder joint fatigue life. This paper presents an analysis on the assembly and the reliability of flip-chips with no-flow underfill. The methodology adopted in the work is a combination of experimental and computer-modeling methods. Two types of no-flow underfill materials have been used for the flip chips. The samples have been inspected with X-ray and scanning acoustic microscope inspection systems to find voids and other defects. Eleven samples for each type of underfill material have been subjected to thermal shock test and the number of cycles to failure for these flip chips have been found. In the computer modeling part of the work, a comprehensive parametric study has provided details on the relationship between the material properties and reliability, and on how underfill entrapment may affect the thermal–mechanical fatigue life of flip chips with no-flow underfill.

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Predicting the reliability of newly designed products, before manufacture, is obviously highly desirable for many organisations. Understanding the impact of various design variables on reliability allows companies to optimise expenditure and release a package in minimum time. Reliability predictions originated in the early years of the electronics industry. These predictions were based on historical field data which has evolved into industrial databases and specifications such as the famous MIL-HDBK-217 standard, plus numerous others. Unfortunately the accuracy of such techniques is highly questionable especially for newly designed packages. This paper discusses the use of modelling to predict the reliability of high density flip-chip and BGA components. A number of design parameters are investigated at the assembly stage, during testing, and in-service.

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In this paper, the effects of the solder reflow process on the reliability of anisotropic conductive film (ACF) interconnections for flip chip on flex (FCOF) applications are investigated. Experiments as well as computer modeling methods have been used. In the experiments, it was found that the contact resistance of ACF joints increased after the subsequent reflow process, and the magnitude of this increase was strongly correlated to the peak temperature of the reflow profile. Nearly 40% of the joints were opened (i.e. lifted away from the pad) after the reflow process with 260 °C peak temperature while no opening was observed when the peak temperature was 210 °C. It is believed that the CTE mismatch between the polymer particle and the adhesive matrix is the main cause of this contact degradation. It was also found that the ACF joints after the reflow process with 210 °C peak temperature showed a high ability to resist water absorption under steady state 85 °C/85%RH conditions, probably because the curing degree of the ACF was improved during the reflow process. To give a good understanding, a 3D model of an ACF joint structure was built and finite element analysis was used to predict the stress distribution in the conductive particles, adhesive matrix and metal pads during the reflow process.

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Cu column bumping is a novel flip chip packaging technique that allows Cu columns to be bonded directly with the dies. It has eliminated the under-bump-metallurgy (UBM) fonnation step of the traditional flip chip manufacturing process. This bumping technique has the potential benefits of simplifying the flip chip manufacturing process, increasing productivity and the UO counts. In this paper, a study of reliability of Cu column bumped flip chips will be presented. Computer modelling methods have been used to predict the shape of solder joints and the response of flip chips to cyclic thermal-mechanical loading. The accumulated plastic strain energy at the corner solder joints has been used as an indicator of the solder joint reliability. Models with a wide range of design parameters have been compared for their reliability. The design parameters that have been investigated are the copper column height and radius, PCB pad radius, solder volume and Cu column wetting height. The relative importance ranking of these parameters has been obtained. The Lead-free solder material 96.5Sn3.5Ag has been used in this modelling work.

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In the flip-chip assembly process, no-flow underfill materials have a particular advantage over traditional underfills as the application and curing of this type of underfill can be undertaken before and during the reflow process - adding high volume throughput. Adopting a no-flow underfill process may result in underfill entrapment between solder and fluid, voiding in the underfill, a possible delamination between underfill and surrounding surfaces. The magnitude of these phenomena may adversely affect the reliability of the assembly in terms of solder joint thermal fatigue. This paper presents both an experimental and mdeling analysis investigating the reliabity of a flip-chip component and how the magnitude of underfill entrapment may affect thermal-mechanical fatigue life.

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A wide range of flip chip technologies with solder or adhesives have become dominant solutions for high density packaging applications due to the excellent electrical performance, high I/O density and good thermal performance. This paper discusses the use of modeling technique to predict the reliability of high density packaged flip chips in the humid environment. Reliability assessment is discussed for flip chip package at ultra-fine pitch with anisotropic conductive film (ACF). The purpose of this modeling work is to understand the role that moisture plays in the failure of ACF flip chips. A macro-micro 3D finite element modeling technique was used in order to make the multi-length-scale modeling of the ACF flip chip possible. Modeling results are consistent with the findings in the experimental work