Thermal analysis of LEDS for liquid crystal display's backlighting

This paper investigated the thermal design of the light emitting diode (LED)onto the board and its packaging. The LED was a 6-lead MultiLED with three chips designed for LCD backlighting and other lighting purposes. A 3D finite element model of this LED was built up and thermal analysis was carried out using the multi physics software package PHYSICA. The modeling results were presented as temperature distributions in each LED, and the predicted junction temperature was used for thermal resistance calculation. The results for the board structure indicated that (1) removing the foil attach decreased the thermal resistance, (2) Increasing the copper foil thickness reduced the thermal resistance. package design indicated that the SMT designed LED with integrated slug gave lower thermal resistance. Pb-free solder material gave lower thermal resistance and junction temperature when compared with conductive adhesive

Ultra-fine pitch stencil printing for a low cost and low temperature flip-chip assembly process

This paper presents the results of a packaging process based on the stencil printing of isotropic conductive adhesives (ICAs) that form the interconnections of flip-chip bonded electronic packages. Ultra-fine pitch (sub-100-mum), low temperature (100degC), and low cost flip-chip assembly is demonstrated. The article details recent advances in electroformed stencil manufacturing that use microengineering techniques to enable stencil fabrication at apertures sizes down to 20mum and pitches as small as 30mum. The current state of the art for stencil printing of ICAs and solder paste is limited between 150-mum and 200-mum pitch. The ICAs-based interconnects considered in this article have been stencil printed successfully down to 50-mum pitch with consistent printing demonstrated at 90-mum pitch size. The structural integrity or the stencil after framing and printing is also investigated through experimentation and computational modeling. The assembly of a flip-chip package based on copper column bumped die and ICA deposits stencil printed at sub-100-mum pitch is described. Computational fluid dynamics modeling of the print performance provides an indicator on the optimum print parameters. Finally, an organic light emitting diode display chip is packaged using this assembly process