Modelling the performance of lead-Free solder interconnects for copper bumped flip-chip devices

Traditionally, before flip chips can be assembled the dies have to be attached with solder bumps. This process involves the deposition of metal layers on the Al pads on the dies and this is called the under bump metallurgy (UBM). In an alternative process, however, Copper (Cu) columns can be used to replace solder bumps and the UBM process may be omitted altogether. After the bumping process, the bumped dies can be assembled on to the printed circuit board (PCB) by using either solder or conductive adhesives. In this work, the reliability issues of flip chips with Cu column bumped dies have been studied. The flip chip lifetime associated with the solder fatigue failure has been modeled for a range of geometric parameters. The relative importance of these parameters is given and solder volume has been identified as the most important design parameter for long-term reliability. Another important problem that has been studied in this work is the dissolution of protection metals on the pad and Cu column in the reflow process. For small solder joints the amount of Cu which dissolves into the molten solder after the protection layers have worn out may significantly affect solder joint properties.

Numerical simulation of vacuum dezincing of lead alloy

Removing zinc by distillation can leave the lead bullion virtually free of zinc and also produces pure zinc crystals. Batch distillation is considered in a hemispherical kettle with water-cooled lid, under high vacuum (50 Pa or less). Sufficient zinc concentration at the evaporating surface is achieved by means of a mechanical stirrer. The numerical model is based on the multiphysics simulation package PHYSICA. The fluid flow module of the code is used to simulate the action of the stirring impeller and to determine the temperature and concentration fields throughout the liquid volume including the evaporating surface. The rate of zinc evaporation and condensation is then modelled using Langmuir’s equations. Diffusion of the zinc vapour through the residual air in the vacuum gap is also taken into account. Computed results show that the mixing is sufficient and the rate-limiting step of the process is the surface evaporation driven by the difference of the equilibrium vapour pressure and the actual partial pressure of zinc vapour. However, at higher zinc concentrations, the heat transfer through the growing zinc crystal crust towards the cold steel lid may become the limiting factor because the crystallization front may reach the melting point. The computational model can be very useful in optimising the process within its safe limits.

Intermetallic phase detection in lead-free solders using synchrotron X-ray diffraction

The high-intensity, high-resolution x-ray source at the European Synchrotron Radiation Facility (ESRF) has been used in x-ray diffraction (XRD) experiments to detect intermetallic compounds (IMCs) in lead-free solder bumps. The IMCs found in 95.5Sn3.8Ag0.7Cu solder bumps on Cu pads with electroplated-nickel immersion-gold (ENIG) surface finish are consistent with results based on traditional destructive methods. Moreover, after positive identification of the IMCs from the diffraction data, spatial distribution plots over the entire bump were obtained. These spatial distributions for selected intermetallic phases display the layer thickness and confirm the locations of the IMCs. For isothermally aged solder samples, results have shown that much thicker layers of IMCs have grown from the pad interface into the bulk of the solder. Additionally, the XRD technique has also been used in a temperature-resolved mode to observe the formation of IMCs, in situ, during the solidification of the solder joint. The results demonstrate that the XRD technique is very attractive as it allows for nondestructive investigations to be performed on expensive state-of-the-art electronic components, thereby allowing new, lead-free materials to be fully characterized.

Modelling the Performance of Flexible Substrates for Lead-Free Applications

In this paper, the performance of flexible substrates for lead-free applications was studied using finite element method (FEM). Firstly, the thermal induced stress in the flex substrate during the lead free solder reflow process was predicted. The shear stress at the interface between the copper track and flex was plotted. This shear stress increases with the thickness of the copper track. Secondly, an ACF flip chip was taken as a typical lead-free application of the flex substrate. The reflow effect on the reliability of ACF interconnections was analyzed. Higher stress was identified along the interface between the conductive particle and the metallization, and the interfacial stress increases with the reflow peak temperature and the coefficient of thermal expansion (CTE) of the adhesive. The moisture effect on the reliability of ACF joints were studied using a macro-micro modeling technique, the predominantly tensile stress found at the interface between the conductive particle and metallization could reduce the contact area and even cause the electrical failure. Modeling results are consistent with the findings in the experimental work

Optimising the wave soldering process for lead free solders

Nitrogen is now used in wave soldering machines to help lower the amount of dross that can be formed on the solder bath surface. The paper provides details on the use of computational fluid dynamics in helping understand the flow profiles of nitrogen in a wave soldering machine and to predict the concentration of nitrogen and oxygen around the solder bath.

Modeling the effect of lead-free soldering on flexible substrates

Flexible Circuit Boards (FPCs) are now being widely used in the electronic industries especially in the areas of electronic packages. Due to European lead-free legislation which has been implemented since July 2006, electronic packaging industries have to switch to use in the lead-free soldering technology. This change has posed a number of challenges in terms of development of lead-free solders and compatible substrates. An increase of at least 20-50 degrees in the reflow temperature is a concern and substantial research is required to investigate a sustainable design of flexible circuit boards as carrier substrates. This paper investigates a number of design variables such as copper conductor width, type of substrate materials, effect of insulating materials, etc. Computer modeling has been used to investigate thermo-mechanical behavior, and reliability, of flexible substrates after they have been subjected to a lead- free solder processing. Results will show particular designs that behave better for a particular rise in peak reflow temperature. Also presented will be the types of failures that can occur in these substrates and what particular materials are more reliable.

Analyzing the performance of flexible substrates for lead-free applications

The performance of flexible substrates for lead-free applications was studied using finite element method (FEM). Firstly, the thermal induced stress in the flex substrate during the lead free solder reflow process was predicted. The shear stress at the interface between the copper track and flex was plotted. This shear stress increases with the thickness of the copper track and the thickness of the flex. Secondly, an anisotropic conductive film (ACF) flip chip was taken as a typical lead-free application of the flex substrate and the moisture effect on the reliability of ACF joints were studied using a 3D macro-micro modeling technique. It is found that the time to be saturated of an ACF flip chip is much dependent on the moisture diffusion rate in the polyimide substrate. The majority moisture diffuses into the ACF layer from the substrate side rather than the periphery of the ACF. The moisture induced stress was predicted and the predominant tensile stress was found at the interface between the conductive particle and metallization which could reduce the contact area and even cause the electrical failure

Thermal-mechanical analysis of flexible substrates during lead-free solder reflow

This paper presents modeling results about the performance of flexible substrates when subjected to higher lead-free reflow temperatures. Both adhesiveless and adhesive types of polyimide substrates were studied. Finite element (FE) models of flex substrates were built, two copper tracks located in the centre of the substrate was considered. The thermal induced shear stress in the flex substrate during the lead-free reflow process was studied and the effect of the design changes including the track thickness, flex thickness, and copper width were studied. For both types of flexes, the one of most important variables for minimizing damage to the substrate is the height of the copper tracks. The height of flex and the width of copper track show less impact. Beside of the geometry effects, the increase in reflow peak temperature can also result in a significant increase in the interfacial stress between the copper track and flex. Higher stresses were identified within the adhesive flex due to the big CTE mismatch between the copper and adhesive/dielectric

Performance and reliability of flexible substrates when subjected to lead-free processing

The use of flexible substrates is growing in many applications such as computer peripherals, hand held devices, telecommunications, automotive, aerospace, etc. The drive to adopt flexible circuits is due to their ability to reduce size, weight, assembly time and cost of the final product.They also accommodate flexibility by allowing relative movement between component parts and provide a route for three dimensional packaging. This paper will describe some of the current research results from the Flex-No-Lead project, a European Commission sponsored research program. The principle aim of this project is to investigate the processing, performance, and reliability of flexible substrates when subjected to new environmentally friendly, lead-free soldering technologies. This paper will discuss the impact of specific design variables on performance and reliability. In particular the paper will focus on copper track designs, substrate material, dielectric material and solder-mask defined joints.

Effect of reflow profile and thermal cycle ageing on the intermetallic formation and growth in lead-free soldering

The formation and growth of intermetallic compound layer thickness is one of the important issues in search for reliable electronic and electrical connections. Intermetallic compounds (IMCs) are an essential part of solder joints. At low levels, they have a strengthening effect on the joint; but at higher levels, they tend to make solder joints more brittle. If the solder joint is subjected to long-standing exposure of high temperature, this could result in continuous growth of intermetallic compound layer. The brittle intermetallic compound layer formed in this way is very much prone to fracture and cold therefore lead to mechanical and electrical failure of the joint. Therefore, the primary aim of this study is to investigate the growth of intermetallic compound layer thickness subjected to five different reflow profiles. The study also looks at the effect of three different temperature cycles (with maximum cycle temperature of 25 0C, 40 0C and 60 0C) on intermetallic compound formation and their growth behaviour.. Two different Sn-Ag-Cu solder pastes (namely paste P1 and paste P2) which were different in flux medium, were used for the study. The result showed that the growth of intermetallic compound layer thickness was a function of ageing temperature. It was found that the rate of growth of intermetallic compound layer thickness of paste P1 was higher than paste P2 at the same temperature condition. This behaviour could be related to the differences in flux mediums of solder paste samples used.

Investigation of wall-slip behaviour in lead-free solder pastes and isotropic conductive adhesives

Slippage due to wall depletion effect is well-known in rheological investigation. The aim of this study was to investigate the influence of the paste microstructure on slip formation for the paste materials (lead-free solder paste and isotropic conductive adhesives). The effect of different flowgeometries, gap heights and surface roughness on the paste viscosity was investigated. The utilisation of different measuring geometries has not clearly showed the presence of wall-slip in the paste samples. The existence of wall-slip was found to be pronounced when gap heights were varied using the parallel plate geometry. It was also found that altering the surface roughness of the parallel plate measuring geometry did not significantly eliminate wall-slip as expected. But results indicate that the use of a relatively rough surface helps to increase paste adhesion to the plates and to a certain extent inducing structural breakdown in the paste. Most importantly, the study also demonstrated on how the wall-slip formation in the paste material could be utilised for understanding of the paste microstructure and its flow behaviour.

The effect of wall-slip formation on the rheological behaviour of lead-free solder pastes

Wall-slip plays an important role in the flow behaviour of solder paste materials. The wall-slip arises due to the various attractive and repulsive forces acting between the solder particles and the walls of the measuring geometry. These interactions could lead to the presence of a thin liquid layer adjacent to the wall, which causes slippage. The aim of this study is to investigate the influence of the solder paste formulation on wall-slip formation and its effect on the printability of these pastes material. A wall slip model is utilised to calculate the true viscosity and slip velocity for the lead-free solder pastes samples used in this study. The difference in the measured viscosity and the true viscosity could indicate wall-slip formation between the solder pastes and the parallel plate. Sample P1 showed a higher slip velocity compared to sample P2. The slip velocity calculated for the solder pastes could be used as a performance indicator to understand the paste release characteristics in the stencil printing process.

Thixotropic studies of lead-based solder, lead-free solder and conductive adhesive pastes

The stencil printing process is an important process in the assembly of Surface Mount Technology (SMT)devices. There is a wide agreement in the industry that the paste printing process accounts for the majority of assembly defects. Experience with this process has shown that typically over 60% of all soldering defects are due to problems associated with the flow properties of solder pastes. Therefore, the rheological measurements can be used as a tool to study the deformation or flow experienced by the pastes during the stencil printing process. This paper presents results on the thixotropic behaviour of three pastes; lead-based solder paste, lead-free solder paste and isotropic conductive adhesive (ICA). These materials are widely used as interconnect medium in the electronics industry. Solder paste are metal alloys suspended in a flux medium while the ICAs consist of silver flakes dispersed in an epoxy resin. The thixotropy behaviour was investigated through two rheological test; (i) hysteresis loop test and (ii) steady shear rate test. In the hysteresis loop test, the shear rate were increased from 0.001 to 100s-1 and then decreased from 100 to 0.001s-1. Meanwhile, in the steady shear rate test, the materials were subjected to a constant shear rate of 0.100, 100 and 0.001s-1 for a period of 240 seconds. All the pastes showed a high degree of shear thinning behaviour with time. This might be due to the agglomeration of particles in the flux or epoxy resin that prohibits pastes flow under low shear rate. The action of high shear rate would break the agglomerates into smaller pieces which facilitates the flow of pastes, thus viscosity is reduced at high shear rate. The solder pastes exhibited a higher degree of structural breakdown compared to the ICAs. The area between the up curve and down curve in the hysteresis curve is an indication of the thixotropic behavior of the pastes. Among the three pastes, lead-free solder paste showed the largest area between the down curve and up curve, which indicating a larger structural breakdown in the pastes, followed by lead-based solder paste and ICA. In a steady shear rate test, viscosity of ICA showed the best recovery with the steeper curve to its original viscosity after the removal of shear, which indicating that the dispersion quality in ICA is good because the high shear has little effect on the microstructure of ICA. In contrast, lead-based paste showed the poorest recovery which means this paste undergo larger structural breakdown and dispersion quality in this paste is poor because the microstructure of the paste is easily disrupted by high shear. The structural breakdown during the application of shear and the recovery after removal of shear is an important characteristic in the paste printing process. If the paste’s viscosity can drop low enough, it may contribute to the aperture filling and quick recovery may prevent slumping.

Investigation of wall-slip effect on lead-free solder paste and isotropic conductive adhesives

Wall-slip plays an important role in characterising the flow behaviour of solder paste materials. The wall slip arises due to the various attractive and repulsive forces acting between the solder particles and the walls of the measuring geometry.These interactions could lead to the presence of a thin solvent layer adjacent to the wall, which gives rise to slippage. The wall slip effect can play an important role in ensure successfulpaste release after the printing process. Wall-slip plays animportant role in characterising the flow behaviour of solderpastes and isotropic conductive adhesives. The study investigates the wall-slip formation in solder paste andisotropic conductive adhesives using flow visualisation technique. The slip distance was measured for parallel plate with different surface roughness in order to quantify the wallslip formations in these paste materials. An ink marker line was drawn between the parallel plate and the free surface of the sample. The parallel was rotated slowly at a constant shear rate of 0.05 sec-1 and the displacement of the ink marker was observed using a video microscope and image capturing software was utilised to capture the displacement of ink marker. From this study, it was found that the wall-slip effect was evident in all the paste materials. In addition, the different surface roughness of the parallel plates did not prevent the formation of wall-slip. This study has revealed that the wallslip effect could used to understand the flow behaviour of the paste in the stencil printing process.

A study on the cost sharing model for supply lead time reduction with component commonality

This paper studies a two-level supply chain consisting of components supplier and product assembly manufacturer, while the manufacturer shares the investment on shortening supply lead time. The objective of this research is to investigate the benefits of cost sharing strategy and adopting component commonality. The result of numerical analysis demonstrates that using component commonality can help reduce the total cost, especially when the manufacture shares a higher fraction of the cost of investment in shortening supply lead time.