176 resultados para Fuel burnup (Nuclear engineering)


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Electromagnetic processing of materials (EPM) is one of the most widely practiced and fast growing applications of magnetic and electric forces to fluid flow. EPM is encountered in both industrial processes and laboratory investigations. Applications range in scale from nano-particle manipulation to tonnes of liquid metal treated in the presence of various configurations of magnetic fields. Some of these processes are specifically designed and made possible by the use of the electromagnetic force, like the magnetic levitation of liquid droplets, whilst others involve electric currents essential for electrothermal or electrochemical reasons, for instance, in electrolytic metal production and in induction melting. An insight for the range of established and novel EPM applications can be found in the review presented by Asai [1] in the EPM-2003 conference proceedings.

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This paper presents the assembly process using next generation electroformed stencils and Isotropic Conductive Adhesives (ICAs) as interconnection material. The utilisation of ICAs in flip-chip assembly process is investigated as an alternative to the lead and lead-free solder alloys and aims to ensure a low temperature (T < 100 °C) assembly process. The paper emphasizes and discusses in details the assembly of a flip-chip package based on copper columns bumped die and substrate with stencil printed ICA deposits at sub-100 μm pitch. A computational modelling approach is undertaken to provide comprehensive results on reliability trends of ICA joints subject to thermal cycling of the flip-chip assembly based on easy to use damage criteria and damage evaluation. Important design parameters in the package are selected and investigated using numerical modelling techniques to provide knowledge and understanding of their impact on the thermo-mechanical behaviour of the flip-chip ICA joints. Sensitivity analysis of the damage in the adhesive material is also carried out. Optimal design rules for enhanced performance and improved thermo-mechanical reliability of ICA assembled flip-chip packages are finally formulated.

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Design for manufacture of system-in-package (SiP) structures is dependent on a number of physical processes that affect the final quality of the package in terms of its performance and reliability. Solder joints are key structures in a SiP and their behavior can be the critical factor in terms of reliability. This paper discusses the results from a research programme on design for manufacturing of system in package (SiP) technologies. The focus of the paper is on thermo-mechanical modelling of solder joints. This includes the behavior of the joints during testing plus some important insights into the reflow process and how physical phenomena taking place at the assembly stage can affect solder joint behavior. Finite element analysis of a numerical model of an SiP structure with various design parameters is discussed. The goal of this analysis is to identify the most promising combination of design parameters which guarantee longer lifetime of the solder joints and hence the SiP component. The parameters that were studied are the size of the package (i.e. number of solder joints per row), the presence of the underfill and/or the reinforcement as well as the thickness of the passive die. Discussion was also provided on phenomena that take place during the reflow process where the solder joints are formed. In particular, the formation of intermetallics at the solder-pad interfaces

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This paper describes a computational strategy for virtual design and prototyping of electronic components and assemblies. The design process is formulated as a design optimisation problem. The solution of this problem identifies not only the design which meets certain user specified requirements but also the design with the maximum possible improvement in particular aspects such as reliability, cost, etc. The modelling approach exploits numerical techniques for computational analysis (Finite Element Analysis) integrated with numerical methods for approximation, statistical analysis and optimisation. A software framework of modules that incorporates the required numerical techniques is developed and used to carry out the design optimisation modelling of fine-pitch flip-chip lead free solder interconnects.

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Power electronic modules distinguish themselves from other modules by their high power operation. These modules are used extensively in high power application markets such as aerospace, automotive, industrial and traction and drives. This paper discusses typical packaging technologies for power electronics modules. It also discusses the latest results from a UK research project investigating the physics-of-failure approach to reliability analysis and predictions for power modules. An integrated design enviroment for incorporating of affects of uncertainty into the design environment was outlined.

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Anisotropic conductive films (ACFs) are widely used in the electronic packaging industries because of their fine pitch potential and the assembly process is simpler compared to the soldering process. However, there are still unsolved issues in the volume productions using ACFs. The main reason is that the effects of many factors on the interconnects are not well understood. This work focuses on the performance of ACF-bonded chip-on-flex assemblies subjected to a range of thermal cycling test conditions. Both experimental and three-dimensional finite element computer modelling methods are used. It has been revealed that greater temperature ranges and longer dwell-times give rise to higher stresses in the ACF interconnects. Higher stresses are concentrated along the edges of the chip-ACF interfaces. In the experiments, the results show that higher temperature ranges and prolonged dwell times increase contact resistance values. Close examination of the microstructures along the bond-line through the scanning electron microscope (SEM) indicates that cyclic thermal loads disjoint the conductive particles from the bump of the chip and/or pad of the substrate and this is thought to be related to the increase of the contact resistance value and the failure of the ACF joints.

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Electronic packaging industries are now in great challenge to find a suitable lead-free solder as an interconnection material to replace the conventional SnPb solders. Many solders such as SnCu, SnAg, SnAgCu, SnZn, SnBi have already been proposed as the replacement but none of them has reached the physical and metallurgical properties similar to the SnPb solder. However, wetting is one of the basic problems that make the lead-free solder inferior as compared to the SnPb solder. Therefore, alloying with the help of third, fourth or fifth element is the researchers' interest to improve the wetting behavior of lead-free solders. This paper describes the comparative wetting behavior of Sn-0.7Cu and Sn-0.7Cu-0.3Ni solders on Cu and Ni substrates. Wetting balance tests were performed to assess the wetting behaviors. Three different commercial fluxes namely no-clean (NC), non-activated (R) and water soluble organic acid (WS)fluxes were used to assess the wettability for three solder bath temperatures. It was found that Sn0.7Cu-03Ni solder exhibits better wettability on Cu substrate for NC and WS fluxes whereas reverse results were found for R-type flux. In the case of Ni substrate, Sn-0.7Cu-0.3Ni solder showed better wetting behavior compared to the well-known Sn-0.7Cu solder. Among the three fluxes, R-type flux showed the worst performance. Very large contact angles were documented for both solders with this flux. Higher solder bath temperature lowered the contact angles, increased the wetting forces and enhanced the wettability. Computer modeling of wetting balance test revealed that both the wetting force and meniscus height are inversely proportional to the contact angles. Modeling results also reveal that increase in solder bath depths and radiuses do not affect significantly on the wetting behavior.

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Flexible Circuit Boards (FPCs) are now being widely used in the electronic industries especially in the areas of electronic packages. Due to European lead-free legislation which has been implemented since July 2006, electronic packaging industries have to switch to use in the lead-free soldering technology. This change has posed a number of challenges in terms of development of lead-free solders and compatible substrates. An increase of at least 20-50 degrees in the reflow temperature is a concern and substantial research is required to investigate a sustainable design of flexible circuit boards as carrier substrates. This paper investigates a number of design variables such as copper conductor width, type of substrate materials, effect of insulating materials, etc. Computer modeling has been used to investigate thermo-mechanical behavior, and reliability, of flexible substrates after they have been subjected to a lead- free solder processing. Results will show particular designs that behave better for a particular rise in peak reflow temperature. Also presented will be the types of failures that can occur in these substrates and what particular materials are more reliable.

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Micro-electronic displays are indispensible devices used in high performance applications such as aerospace, medical, marine and industrial sectors.These devices provide an interface to real time mission critical devices and therefore require good optical visual performance and high reliability, all this within varied and challenging environments.

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Micro-electronic displays are sensitive devices and its performance is easily affected by external environmental factors. To enable the display to perform in extreme conditions, the device must be structurally strengthened, the effects of this packaging process was investigated. A thermo-mechanical finite element analysis was used to discover potential problems in the packaging process and to improve the overall design of the device. The main concern from the analysis predicted that displacement of the borosilicate glass and the Y stress of the adhesive are important. Using this information a design which reduced the variation of displacement and kept the stress to a minimum was suggested

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The performance enhancement of AMLCD's has been hindered with problems encountered during the curing process, such as window framing and de-lamination of the glass and adhesive. A thermo-mechanical analysis using FEA was conducted to help optimise the design of the rugged display and enhance the optical performance.

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The performance of flexible substrates for lead-free applications was studied using finite element method (FEM). Firstly, the thermal induced stress in the flex substrate during the lead free solder reflow process was predicted. The shear stress at the interface between the copper track and flex was plotted. This shear stress increases with the thickness of the copper track and the thickness of the flex. Secondly, an anisotropic conductive film (ACF) flip chip was taken as a typical lead-free application of the flex substrate and the moisture effect on the reliability of ACF joints were studied using a 3D macro-micro modeling technique. It is found that the time to be saturated of an ACF flip chip is much dependent on the moisture diffusion rate in the polyimide substrate. The majority moisture diffuses into the ACF layer from the substrate side rather than the periphery of the ACF. The moisture induced stress was predicted and the predominant tensile stress was found at the interface between the conductive particle and metallization which could reduce the contact area and even cause the electrical failure

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This paper presents modeling results about the performance of flexible substrates when subjected to higher lead-free reflow temperatures. Both adhesiveless and adhesive types of polyimide substrates were studied. Finite element (FE) models of flex substrates were built, two copper tracks located in the centre of the substrate was considered. The thermal induced shear stress in the flex substrate during the lead-free reflow process was studied and the effect of the design changes including the track thickness, flex thickness, and copper width were studied. For both types of flexes, the one of most important variables for minimizing damage to the substrate is the height of the copper tracks. The height of flex and the width of copper track show less impact. Beside of the geometry effects, the increase in reflow peak temperature can also result in a significant increase in the interfacial stress between the copper track and flex. Higher stresses were identified within the adhesive flex due to the big CTE mismatch between the copper and adhesive/dielectric

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The results of a finite element computer modelling analysis of a micro-manufactured one-turn magnetic inductor using the software package ANSYS 10.0 are presented. The inductor is designed for a DC-DC converter used in microelectronic devices. It consists of a copper conductor with a rectangular cross-section plated with an insulation layer and a layer of magnetic core. The analysis has focused on the effects of the frequency and the air gaps on the on the inductance values and the Joule losses in the core and conductor. It has been found that an inductor with small multiple air gaps has lower losses than an inductor with a single larger gap

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There are increasing demands on the power density and efficiency of DC-DC power converters due to the soaring functionality and operational longevity required for today's electronic products. In addition, DC-DC converters are required to operate at new elevated frequencies in the MHz frequency regime. Typical ferrite cores, whose useable flux density falls drastically at these frequencies, have to be replaced and a method of producing compact component windings developed. In this study, two types of microinductors, pot-core and solenoid, for DC-DC converter applications have been analyzed for their performance in the MHz frequency range. The inductors were manufactured using an adapted UV-LIGA process and included electrodeposited nickel-iron and the commercial alloy Vitrovac 6025 as core materials. Using a vibrating sample magnetometer (VSM) and a Hewlett Packard 4192A LF- impedance analyzer, the inductor characteristics such as power density, efficiency, inductance and Q-factor were recorded. Experimental, finite element and analytical results were used to assess the suitability of the magnetic materials and component geometries for low MHz operation.