Computational modeling techniques for reliability of electronic components on printed circuit boards

This paper describes modeling technology and its use in providing data governing the assembly and subsequent reliability of electronic chip components on printed circuit boards (PCBs). Products, such as mobile phones, camcorders, intelligent displays, etc., are changing at a tremendous rate where newer technologies are being applied to satisfy the demands for smaller products with increased functionality. At ever decreasing dimensions, and increasing number of input/output connections, the design of these components, in terms of dimensions and materials used, is playing a key role in determining the reliability of the final assembly. Multiphysics modeling techniques are being adopted to predict a range of interacting physics-based phenomena associated with the manufacturing process. For example, heat transfer, solidification, marangoni fluid flow, void movement, and thermal-stress. The modeling techniques used are based on finite volume methods that are conservative and take advantage of being able to represent the physical domain using an unstructured mesh. These techniques are also used to provide data on thermal induced fatigue which is then mapped into product lifetime predictions.

Thermal, mechanical and optical modelling of VCSEL packaging

Hybrid OECB (Opto-Electrical Circuit Boards) are expected to make a significant impact in the telecomm switches arena within the next five years, creating optical backplanes with high speed point-to-point optical interconnects. OECB's incorporate short range optical interconnects, and are based on VCSEL (Vertical Cavity Surface Emitting Diode) and PD (Photo Diode) pairs, connected to each other via embedded waveguides in the OECB. The VCSEL device is flip-chip assembled onto an organic substrate with embedded optical waveguides. The performance of the VCSEL device is governed by the thermal, mechanical and optical characteristics of this assembly. During operation, the VCSEL device will heat up and the thermal change together with the CTE mismatch in the materials, will result in potential misalignment between the VCSEL apertures and the waveguide openings in the substrate. Any degree of misalignment will affect the optical performance of the package. This paper will present results from a highly coupled modelling analysis involving thermal, mechanical and optical models. The paper will also present results from an optimisation analysis based on Design of Experiments (DOE).

Low Reynolds number turbulence models for accurate thermal simulations of electronic components

The electronics industry and the problems associated with the cooling of microelectronic equipment are developing rapidly. Thermal engineers now find it necessary to consider the complex area of equipment cooling at some level. This continually growing industry also faces heightened pressure from consumers to provide electronic product miniaturization, which in itself increases the demand for accurate thermal management predictions to assure product reliability. Computational fluid dynamics (CFD) is considered a powerful and almost essential tool for the design, development and optimization of engineering applications. CFD is now widely used within the electronics packaging design community to thermally characterize the performance of both the electronic component and system environment. This paper discusses CFD results for a large variety of investigated turbulence models. Comparison against experimental data illustrates the predictive accuracy of currently used models and highlights the growing demand for greater mathematical modelling accuracy with regards to thermal characterization. Also a newly formulated low Reynolds number (i.e. transitional) turbulence model is proposed with emphasis on hybrid techniques.

Ultra-fine pitch flip-chip assembly using isotropic conductive adhesives

This paper discusses results from a highly interdisciplinary research project which investigated different packaging options for ultra-fine pitch, low temperature and low cost flip-chip assembly. Isotropic Conductive Adhesives (ICAs) are stencil printed to form the interconnects for the package. ICAs are utilized to ensure a low temperature assembly process of flip-chip copper column bumped packages. Results are presented on the structural integrity of novel electroformed stencils. ICA deposits at sub-100 micron pitch and the subsequent thermo-mechanical behaviour of the flip-chip ICA joints are analysed using numerical modelling techniques. Optimal design rules for enhanced performance and thermomechanical reliability of ICA assembled flip-chip packages are formulated.

Response Surface Modeling and Optimisation for Reliable Electronic Products

The aim of integrating computational mechanics (FEA and CFD) and optimization tools is to speed up dramatically the design process in different application areas concerning reliability in electronic packaging. Design engineers in the electronics manufacturing sector may use these tools to predict key design parameters and configurations (i.e. material properties, product dimensions, design at PCB level. etc) that will guarantee the required product performance. In this paper a modeling strategy coupling computational mechanics techniques with numerical optimization is presented and demonstrated with two problems. The integrated modeling framework is obtained by coupling the multi-physics analysis tool PHYSICA - with the numerical optimization package - Visua/DOC into a fuJly automated design tool for applications in electronic packaging. Thermo-mechanical simulations of solder creep deformations are presented to predict flip-chip reliability and life-time under thermal cycling. Also a thermal management design based on multi-physics analysis with coupled thermal-flow-stress modeling is discussed. The Response Surface Modeling Approach in conjunction with Design of Experiments statistical tools is demonstrated and used subsequently by the numerical optimization techniques as a part of this modeling framework. Predictions for reliable electronic assemblies are achieved in an efficient and systematic manner.

Electronic packaging and reduction in modelling time using domain decomposition

The domain decomposition method is directed to electronic packaging simulation in this article. The objective is to address the entire simulation process chain, to alleviate user interactions where they are heavy to mechanization by component approach to streamline the model simulation process.

Numerical Modelling for Electronic Packaging - Future Requirements

The fabrication, assembly and testing of electronic packaging can involve complex interactions between physical phenomena such as temperature, fluid flow, electromagnetics, and stress. Numerical modelling and optimisation tools are key computer-aided-engineering technologies that aid design engineers. This paper discusses these technologies and there future developments.

Policy-based techniques for self-managing parallel applications

This paper presents an empirical investigation of policy-based self-management techniques for parallel applications executing in loosely-coupled environments. The dynamic and heterogeneous nature of these environments is discussed and the special considerations for parallel applications are identified. An adaptive strategy for the run-time deployment of tasks of parallel applications is presented. The strategy is based on embedding numerous policies which are informed by contextual and environmental inputs. The policies govern various aspects of behaviour, enhancing flexibility so that the goals of efficiency and performance are achieved despite high levels of environmental variability. A prototype self-managing parallel application is used as a vehicle to explore the feasibility and benefits of the strategy. In particular, several aspects of stability are investigated. The implementation and behaviour of three policies are discussed and sample results examined.

Thermo-mechanical analysis of the packaging process for micro-electronic displays

Micro-electronic displays are sensitive devices and its performance is easily affected by external environmental factors. To enable the display to perform in extreme conditions, the device must be structurally strengthened, the effects of this packaging process was investigated. A thermo-mechanical finite element analysis was used to discover potential problems in the packaging process and to improve the overall design of the device. The main concern from the analysis predicted that displacement of the borosilicate glass and the Y stress of the adhesive are important. Using this information a design which reduced the variation of displacement and kept the stress to a minimum was suggested

Analysis of the thermo mechanical effects on packaging process of performance enhanced AMLCD's and the optical performance of the display

The performance enhancement of AMLCD's has been hindered with problems encountered during the curing process, such as window framing and de-lamination of the glass and adhesive. A thermo-mechanical analysis using FEA was conducted to help optimise the design of the rugged display and enhance the optical performance.

Optoelectronic packaging interfaces for submicron alignment (OPISA) and the dynamics of laser spot weld formation

The work presented in this paper is part of the OPISA project. This is a collaborative research project between the University of Greenwich and Bookham Technology. This report describes some of the initial work undertaken towards the goal of investigating optoelectronic packaging where alignment issues between optical sources and fibers can arise as part of the fabrication process. The focus of this study is on charting the dynamics of laser spot weld formation. This paper introduces some of the initial simulation work that has been undertaken and presents a model describing a transient heat source applied from a laser pulse to weld a stainless steel sleeve and ferrule and the resulting weld formation

Design and modeling challenges for high density packaging

Today most of the IC and board designs are undertaken using two-dimensional graphics tools and rule checks. System-in-package is driving three-dimensional design concepts and this is posing a number of challenges for electronic design automation (EDA) software vendors. System-in-package requires three-dimensional EDA tools and design collaboration systems with appropriate manufacturing and assembly rules for these expanding technologies. Simulation and Analysis tools today focus on one aspect of the design requirement, for example, thermal, electrical or mechanical. System-in-Package requires analysis and simulation tools that can easily capture the complex three dimensional structures and provided integrated fast solutions to issues such as thermal management, reliability, electromagnetic interference, etc. This paper discusses some of the challenges faced by the design and analysis community in providing appropriate tools to engineers for System-in-Package design

Ultra-fine pitch stencil printing for a low cost and low temperature flip-chip assembly process

This paper presents the results of a packaging process based on the stencil printing of isotropic conductive adhesives (ICAs) that form the interconnections of flip-chip bonded electronic packages. Ultra-fine pitch (sub-100-mum), low temperature (100degC), and low cost flip-chip assembly is demonstrated. The article details recent advances in electroformed stencil manufacturing that use microengineering techniques to enable stencil fabrication at apertures sizes down to 20mum and pitches as small as 30mum. The current state of the art for stencil printing of ICAs and solder paste is limited between 150-mum and 200-mum pitch. The ICAs-based interconnects considered in this article have been stencil printed successfully down to 50-mum pitch with consistent printing demonstrated at 90-mum pitch size. The structural integrity or the stencil after framing and printing is also investigated through experimentation and computational modeling. The assembly of a flip-chip package based on copper column bumped die and ICA deposits stencil printed at sub-100-mum pitch is described. Computational fluid dynamics modeling of the print performance provides an indicator on the optimum print parameters. Finally, an organic light emitting diode display chip is packaged using this assembly process

Policy-centric integration and dynamic composition of autonomic computing techniques

This paper presents innovative work in the development of policy-based autonomic computing. The core of the work is a powerful and flexible policy-expression language AGILE, which facilitates run-time adaptable policy configuration of autonomic systems. AGILE also serves as an integrating platform for other self-management technologies including signal processing, automated trend analysis and utility functions. Each of these technologies has specific advantages and applicability to different types of dynamic adaptation. The AGILE platform enables seamless interoperability of the different technologies to each perform various aspects of self-management within a single application. The various technologies are implemented as object components. Self-management behaviour is specified using the policy language semantics to bind the various components together as required. Since the policy semantics support run-time re-configuration, the self-management architecture is dynamically composable. Additional benefits include the standardisation of the application programmer interface, terminology and semantics, and only a single point of embedding is required.

Variable frequency microwave curing of polymer materials in microelectronics packaging applications

The use of variable frequency microwave technology in curing of polymer materials used in microelectronics applications is discussed. A revolutionary open-ended microwave curing system is outlined and assessed using experimental and numerical approaches. Experimental and numerical results are presented, demonstrating the feasibility of the system