Moisture Effects on the Reliability of Anisotropic Conductive Films

Anisotropic conductive film (ACF) which consists of an adhesive epoxy matrix and randomly distributed conductive particles are widely used as the connection material for electronic devices with high I/O counts. However, for the semiconductor industry the reliability of the ACF is still a major concern due to a lack of experimental reliability data. This paper reports an investigation into the moisture effects on the reliability of ACF interconnections in the flip-chip-on-flex (FCOF) applications. A macro-micro 3D finite element modeling technique was used in order to make the multi-length-scale modeling of the ACF flip chip possible. The purposes of this modeling work was to understand the role that moisture plays in the failure of ACF flip chips, and to look into the influence of physical properties and geometric characteristics, such as the coefficient of the moisture expansion (CME), Young's modulus of the adhesive matrix and the bump height on the reliability of the ACF interconnections in a humid environment. Simulation results suggest that moisture-induced swelling of the adhesive matrix is the major cause of the ACF joint opening. Modeling results are consistent with the findings in the experimental work.

Effects of solder reflow on the reliability of flip-chip on flex interconnections using anisotropic conductive adhesives

This work describes the work of an investigation of the effects of solder reflow process on the reliability of anisotropic conductive film (ACF) interconnection for flip-chip on flex (FCOF) applications. Experiments as well as computer modeling methods have been used. The results show that the contact resistance of ACF interconnections increases after the reflow and the magnitude of the increase is strongly correlated to the peak reflow temperature. In fact, nearly 40 percent of the joints are open when the peak reflow temperature is 260°C, while there is no opening when the peak temperature is 210°C. It is believed that the coefficient of thermal expansion (CTE) mismatch between the polymer particle and the adhesive matrix is the main cause of this contact degradation. To understand this phenomenon better, a three-dimensional (3-D) finite element (FE) model of an ACF joint has been analyzed in order to predict the stress distribution in the conductive particles, adhesive matrix and metal pads during the reflow process. The stress level at the interface between the particle and its surrounding materials is significant and it is the highest at the interface between the particle and the adhesive matrix.

Review of the technology and reliability issues arising as optical interconnects migrate onto the circuit board

Light has the greatest information carrying potential of all the perceivable interconnect mediums; consequently, optical fiber interconnects rapidly replaced copper in telecommunications networks, providing bandwidth capacity far in excess of its predecessors. As a result the modern telecommunications infrastructure has evolved into a global mesh of optical networks with VCSEL’s (Vertical Cavity Surface Emitting Lasers) dominating the short-link markets, predominately due to their low-cost. This cost benefit of VCSELs has allowed optical interconnects to again replace bandwidth limited copper as bottlenecks appear on VSR (Very Short Reach) interconnects between co-located equipment inside the CO (Central-Office). Spurred by the successful deployment in the VSR domain and in response to both intra-board backplane applications and inter-board requirements to extend the bandwidth between IC’s (Integrated Circuits), current research is migrating optical links toward board level USR (Ultra Short Reach) interconnects. Whilst reconfigurable Free Space Optical Interconnect (FSOI) are an option, they are complicated by precise line-of-sight alignment conditions hence benefits exist in developing guided wave technologies, which have been classified into three generations. First and second generation technologies are based upon optical fibers and are both capable of providing a suitable platform for intra-board applications. However, to allow component assembly, an integral requirement for inter-board applications, 3rd generation Opto-Electrical Circuit Boards (OECB’s) containing embedded waveguides are desirable. Currently, the greatest challenge preventing the deployment of OECB’s is achieving the out-of-plane coupling to SMT devices. With the most suitable low-cost platform being to integrate the optics into the OECB manufacturing process, several research avenues are being explored although none to date have demonstrated sufficient coupling performance. Once in place, the OECB assemblies will generate new reliability issues such as assembly configurations, manufacturing tolerances, and hermetic requirements that will also require development before total off-chip photonic interconnection can truly be achieved

An analysis of the passenger to cabin crew ratio and exit reliability based on past survivable aviation accidents

A hotly debated issue in the area of aviation safety is the number of cabin crew members required to evacuate an aircraft in the event of an emergency. Most countries regulate the minimum number required for the safe operation of an aircraft, but these rulings are based on little if any scientific evidence. Another issue of concern is the failure rate of exits and slides. This paper examines these issues using the latest version of Aircraft Accident Statistics and Knowledge database AASK V4.0, which contains information from 105 survivable crashes and more than 2,000 survivors, including accounts from 155 cabin crew members.

Reliability study of the electroless Ni–P layer against solder alloy

Copper (Cu) has been widely used in the under bump metallurgy of chip and substrate metallization for chip packaging. However, due to the rapid formation of Cu–Sn intermetallic compound (IMC) at the tin-based solder/Cu interface during solder reaction, the reliability of this type of solder joint is a serious concern. In this work, electroless nickel–phosphorous (Ni–P) layer was deposited on the Cu pad of the flexible substrate as a diffusion barrier between Cu and the solder materials. The deposition was carried out in a commercial acidic sodium hypophosphite bath at 85 °C for different pH values. It was found that for the same deposition time period, higher pH bath composition (mild acidic) yields thicker Ni–P layer with lower phosphorous content. Solder balls having composition 62%Sn–36%Pb–2%Ag were reflowed at 240 °C for 1 to 180 min on three types of electroless Ni–P layers deposited at the pH value of 4, 4.8 and 6, respectively. Thermal stability of the electroless Ni–P barrier layer against the Sn–36%Pb–2%Ag solder reflowed for different time periods was examined by scanning electron microscopy equipped with energy dispersed X-ray. Solder ball shear test was performed in order to find out the relationship between the mechanical strength of solder joints and the characteristics of the electroless Ni–P layer deposited. The layer deposited in the pH 4 acidic bath showed the weak barrier against reflow soldering whereas layer deposited in pH 6 acidic bath showed better barrier against reflow soldering. Mechanical strength of the joints were deteriorated quickly in the layer deposited at pH 4 acidic bath, which was found to be thin and has a high phosphorous content. From the cross-sectional studies and fracture surface analyses, it was found that the appearance of the dark crystalline phosphorous-rich Ni layer weakened the interface and hence lower solder ball shear strength. Ni–Sn IMC formed at the interfaces was found to be more stable at the low phosphorous content (∼14 at.%) layer. Electroless Ni–P deposited at mild acidic bath resulting phosphorous content of around 14 at.% is suggested as the best barrier layer for Sn–36%Pb–2%Ag solder.

Review of methods to predict solder joint reliability under thermo-mechanical cycling

Solder joints are often the cause of failure in electronic devices, failing due to cyclic creep induced ductile fatigue. This paper will review the modelling methods available to predict the lifetime of SnPb and SnAgCu solder joints under thermo-mechanical cycling conditions such as power cycling, accelerated thermal cycling and isothermal testing, the methods do not apply to other damage mechanisms such as vibration or drop-testing. Analytical methods such as recommended by the IPC are covered, which are simple to use but limited in capability. Finite element modelling methods are reviewed, along with the necessary constitutive laws and fatigue laws for solder, these offer the most accurate predictions at the current time. Research on state-of-the-art damage mechanics methods is also presented, although these have not undergone enough experimental validation to be recommended at present

Reliability analysis for power electronics modules

This paper discusses the reliability of power electronics modules. The approach taken combines numerical modeling techniques with experimentation and accelerated testing to identify failure modes and mechanisms for the power module structure and most importantly the root cause of a potential failure. The paper details results for two types of failure (i) wire bond fatigue and (ii) substrate delamination. Finite element method modeling techniques have been used to predict the stress distribution within the module structures. A response surface optimisation approach has been employed to enable the optimal design and parameter sensitivity to be determined. The response surface is used by a Monte Carlo method to determine the effects of uncertainty in the design.

Wire bond reliability for power electronic modules - effect of bonding temperature

In this paper, thermal cycling reliability along with ANSYS analysis of the residual stress generated in heavy-gauge Al bond wires at different bonding temperatures is reported. 99.999% pure Al wires of 375 mum in diameter, were ultrasonically bonded to silicon dies coated with a 5mum thick Al metallisation at 25degC (room temperature), 100degC and 200degC, respectively (with the same bonding parameters). The wire bonded samples were then subjected to thermal cycling in air from -60degC to +150degC. The degradation rate of the wire bonds was assessed by means of bond shear test and via microstructural characterisation. Prior to thermal cycling, the shear strength of all of the wire bonds was approximately equal to the shear strength of pure aluminum and independent of bonding temperature. During thermal cycling, however, the shear strength of room temperature bonded samples was observed to decrease more rapidly (as compared to bonds formed at 100degC and 200degC) as a result of a high crack propagation rate across the bonding area. In addition, modification of the grain structure at the bonding interface was also observed with bonding temperature, leading to changes in the mechanical properties of the wire. The heat and pressure induced by the high temperature bonding is believed to promote grain recovery and recrystallisation, softening the wires through removal of the dislocations and plastic strain energy. Coarse grains formed at the bonding interface after bonding at elevated temperatures may also contribute to greater resistance for crack propagation, thus lowering the wire bond degradation rate

Reliability of power electronic modules

The electric car, the all electric aircraft and requirements for renewable energy are examples of potential technologies needed to address the world problem of global warming/carbon emission etc. Power electronics and packaged modules are fundamental for the underpinning of these technologies and with the diverse requirements for electrical configurations and the range of environmental conditions, time to market is paramount for module manufacturers and systems designers alike. This paper details some of the results from a major UK project into the reliability of power electronic modules using physics of failure techniques. This paper presents a design methodology together with results that demonstrate enhanced product design with improved reliability, performance and value within acceptable time scales

Predicting the reliability of power electronic modules

This paper discusses the reliability of an IGBT power electronics module. This work is part of a major UK funded initiative into the design, packaging and reliability of power electronic modules. The predictive methodology combines numerical modeling techniques with experimentation and accelerated testing to identify failure modes and mechanisms for these type of power electronic module structures. The paper details results for solder joint failure substrate solder. Finite element method modeling techniques have been used to predict the stress and strain distribution within the module structures. Together with accelerated life testing, these results have provided a failure model for these joints which has been used to predict reliability of a rail traction application

Reliability analysis of SiP structures

This presentation discusses latest developments in SiP technology and the challenges for design in terms of manufacture and reliability. It presents results from a UK government funded project that aims to develop modelling techniques that will assess the thermo-mechanical reliability of SiP structures such as (i) stacked die, (ii) side-by-side dies and (iii) embedded die. Finite element analysis coupled with numerical optimisation and uncertainty analysis is used is used to model the reliability of a particular package design. In particular, the damage (energy density) in the lead free solder interconnects under accelerated temperature cycling is predicted and used to observe the fatigue life-time. Warpage of the structure is also investigated

Reliability based design optimisation for system-in-package

This paper discusses a reliability based optimisation modelling approach demonstrated for the design of a SiP structure integrated by stacking dies one upon the other. In this investigation the focus is on the strategy for handling the uncertainties in the package design inputs and their implementation into the design optimisation modelling framework. The analysis of fhermo-mechanical behaviour of the package is utilised to predict the fatigue life-time of the lead-free board level solder interconnects and warpage of the package under thermal cycling. The SiP characterisation is obtained through the exploitation of Reduced Order Models (ROM) constructed using high fidelity analysis and Design of Experiments (DoE) methods. The design task is to identify the optimal SiP design specification by varying several package input parameters so that a specified target reliability of the solder joints is achieved and in the same time design requirements and package performance criteria are met

Performance and reliability of flexible substrates when subjected to lead-free processing

The use of flexible substrates is growing in many applications such as computer peripherals, hand held devices, telecommunications, automotive, aerospace, etc. The drive to adopt flexible circuits is due to their ability to reduce size, weight, assembly time and cost of the final product.They also accommodate flexibility by allowing relative movement between component parts and provide a route for three dimensional packaging. This paper will describe some of the current research results from the Flex-No-Lead project, a European Commission sponsored research program. The principle aim of this project is to investigate the processing, performance, and reliability of flexible substrates when subjected to new environmentally friendly, lead-free soldering technologies. This paper will discuss the impact of specific design variables on performance and reliability. In particular the paper will focus on copper track designs, substrate material, dielectric material and solder-mask defined joints.

Modelling the reliability of components on flexible substrates

The use of flexible substrates is growing in many applications such as computer peripherals, hand held devices, telecommunications, automotive, aerospace, etc. The drive to adopt flexible circuits is due to their ability to reduce size, weight, assembly time and cost of final product. they also accommodate flexibility by allowing relative movement between component parts and provide a route for three dimensional packaging. This paper will describe some of the current research results from the Flex-No-Lead project, European Commission sponsored programme. The principle aim of this project is to investigate the processing, performance and reliability of flexible substrates when subjected to new environmentally friendly, lead-free soldering technologies. This paper will discuss the impact of specific design variables on performance and reliability. In particular the paper will focus on copper track designs, substrate material, dielectric material and solder mask defined joints

Effect of current stressing on the reliability of 63Sn37Pb solder joints

The effect of current stressing on the reliability of 63Sn37Pb solder joints with Cu pads was investigated at temperatures of −5 °C and 125 °C up to 600 h. The samples were stressed with 3 A current (6.0 × 102 A/cm2 in the solder joint with diameter of 800 μm and 1.7 × 104 A/cm2 in the Cu trace with cross section area of 35 × 500 μm). The temperatures of the samples and interfacial reaction within the solder joints were examined. The microstructural change of the solder joints aged at 125 °C without current flow was also evaluated for comparison. It was confirmed that the current flow could cause the temperature of solder joints to rise rapidly and remarkably due to accumulation of massive Joule heat generated by the Cu trace. The solder joints stressed at 125 °C with 3 A current had an extensive growth of Cu6Sn5 and Cu3Sn intermetallic compounds (IMC) at both top and bottom solder-to-pad interfaces. It was a direct result of accelerated aging rather than an electromigration or thermomigration effect in this experiment. The kinetic is believed to be bulk diffusion controlled solid-state reaction, irrespective of the electron flow direction. When stressed at −5 °C with 3 A current, no significant change in microstructure and composition of the solder joints had occurred due to a very low diffusivity of the atoms as most Joule heat was eliminated at low temperature. The IMC evolution of the solder joints aged at 125 °C exhibited a subparabolic growth behavior, which is presumed to be a combined mechanism of grain boundary diffusion and bulk diffusion. This is mainly ascribed to the retardant effect against the diffusion course by the sufficiently thick IMC layer that was initially formed during the reflow soldering.