CONTROL OF SIZE AND MAGNETIC PROPERTIES OF CARBOXYL-FUNCTIONALIZED MAGNETITE PARTICLES: SYNTHESIS PROCEDURES, CHARACTERIZATIONS, AND APPLICATIONS

Magnetic nanoparticles (MNPs) are known for the unique properties conferred by their small size and have found wide application in food safety analyses. However, their high surface energy and strong magnetization often lead to aggregation, compromising their functions. In this study, iron oxide magnetic particles (MPs) over the range of nano to micro size were synthesized, from which particles with less aggregation and excellent magnetic properties were obtained. MPs were synthesized via three different hydrothermal procedures, using poly (acrylic acid) (PAA) of different molecular weight (Mw) as the stabilizer. The particle size, morphology, and magnetic properties of the MPs from these synthesis procedures were characterized and compared. Among the three syntheses, one-step hydrothermal synthesis demonstrated the highest yield and most efficient magnetic collection of the resulting PAA-coated magnetic microparticles (PAA-MMPs, >100 nm). Iron oxide content of these PAA-MMPs was around 90%, and the saturation magnetization ranged from 70.3 emu/g to 57.0 emu/g, depending on the Mw of PAA used. In this approach, the particles prepared using PAA with Mw of 100K g/mol exhibited super-paramagnetic behavior with ~65% lower coercivity and remanence compared to others. They were therefore less susceptible to aggregation and remained remarkably water-dispersible even after one-month storage. Three applications involving PAA-MMPs from one-step hydrothermal synthesis were explored: food proteins and enzymes immobilization, antibody conjugation for pathogen capture, and magnetic hydrogel film fabrication. These studies demonstrated their versatile functions as well as their potential applications in the food science area.

Architectural-Physical Co-Design of 3D CPUs with Micro-Fluidic Cooling

The performance, energy efficiency and cost improvements due to traditional technology scaling have begun to slow down and present diminishing returns. Underlying reasons for this trend include fundamental physical limits of transistor scaling, the growing significance of quantum effects as transistors shrink, and a growing mismatch between transistors and interconnects regarding size, speed and power. Continued Moore's Law scaling will not come from technology scaling alone, and must involve improvements to design tools and development of new disruptive technologies such as 3D integration. 3D integration presents potential improvements to interconnect power and delay by translating the routing problem into a third dimension, and facilitates transistor density scaling independent of technology node. Furthermore, 3D IC technology opens up a new architectural design space of heterogeneously-integrated high-bandwidth CPUs. Vertical integration promises to provide the CPU architectures of the future by integrating high performance processors with on-chip high-bandwidth memory systems and highly connected network-on-chip structures. Such techniques can overcome the well-known CPU performance bottlenecks referred to as memory and communication wall. However the promising improvements to performance and energy efficiency offered by 3D CPUs does not come without cost, both in the financial investments to develop the technology, and the increased complexity of design. Two main limitations to 3D IC technology have been heat removal and TSV reliability. Transistor stacking creates increases in power density, current density and thermal resistance in air cooled packages. Furthermore the technology introduces vertical through silicon vias (TSVs) that create new points of failure in the chip and require development of new BEOL technologies. Although these issues can be controlled to some extent using thermal-reliability aware physical and architectural 3D design techniques, high performance embedded cooling schemes, such as micro-fluidic (MF) cooling, are fundamentally necessary to unlock the true potential of 3D ICs. A new paradigm is being put forth which integrates the computational, electrical, physical, thermal and reliability views of a system. The unification of these diverse aspects of integrated circuits is called Co-Design. Independent design and optimization of each aspect leads to sub-optimal designs due to a lack of understanding of cross-domain interactions and their impacts on the feasibility region of the architectural design space. Co-Design enables optimization across layers with a multi-domain view and thus unlocks new high-performance and energy efficient configurations. Although the co-design paradigm is becoming increasingly necessary in all fields of IC design, it is even more critical in 3D ICs where, as we show, the inter-layer coupling and higher degree of connectivity between components exacerbates the interdependence between architectural parameters, physical design parameters and the multitude of metrics of interest to the designer (i.e. power, performance, temperature and reliability). In this dissertation we present a framework for multi-domain co-simulation and co-optimization of 3D CPU architectures with both air and MF cooling solutions. Finally we propose an approach for design space exploration and modeling within the new Co-Design paradigm, and discuss the possible avenues for improvement of this work in the future.