ASSESSING THE LEVEL OF TECHNOLOGY INTEGRATION OF TITLE I TEACHERS IN A LARGE URBAN SCHOOL DISTRICT

By law, Title I schools employ teachers who are both competent in their subject knowledge and State certified. In addition, Title I teachers receive ongoing professional development in technology integration and are equipped with the latest innovative resources to integrate technology in the classroom. The aim is higher academic achievement and the effective use of technology in the classroom. The investment to implement technology in this large urban school district to improve student achievement has continued to increase. In order to infuse current and emerging technology throughout the curriculum, this school district needs to know where teachers have, and have not, integrated technology. Yet the level of how technology is integrated in Title I schools is unknown. This study used the Digital-Age Survey Levels of Teaching Innovation (LoTi) to assess 508 Title I teachers’ technology integration levels using three major initiatives purchased by Title I— the iPads program, the Chromebook initiative, and the interactive whiteboards program. The study used a quantitative approach. Descriptive statistics, regression analysis, and statistical correlations were used to examine the relationship between the level of technology integration and the following dependent variables: personal computer use (PCU), current instructional practices (CIP), and levels of teaching innovation (LoTi). With this information, budgetary decisions and professional development can be tailored to the meet the technology implementation needs of this district. The result of this study determined a significant relationship between the level of teaching innovation, personal computer use, and current instructional practices with teachers who teach with iPad, Chromebook, and/or interactive whiteboard. There was an increase in LoTi, PCU, and CIP scores with increasing years of experience of Title I teachers. There was also a significant relationship between teachers with 20 years or more teaching experience and their LoTi score.

THE ROLE OF RULES, EXAMPLES AND INDIVIDUAL DIFFERENCES IN THE ACQUISITION OF DECLARATIVE AND PROCEDURAL SECOND LANGUAGE KNOWLEDGE

The relevance of explicit instruction has been well documented in SLA research. Despite numerous positive findings, however, the issue continues to engage scholars worldwide. One issue that was largely neglected in previous empirical studies - and one that may be crucial for the effectiveness of explicit instruction - is the timing and integration of rules and practice. The present study investigated the extent to which grammar explanation (GE) before practice, grammar explanation during practice, and individual differences impact the acquisition of L2 declarative and procedural knowledge of two grammatical structures in Spanish. In this experiment, 128 English-speaking learners of Spanish were randomly assigned to four experimental treatments and completed comprehension-based task-essential practice for interpreting object-verb (OV) and ser/estar (SER) sentences in Spanish. Results confirmed the predicted importance of timing of GE: participants who received GE during practice were more likely to develop and retain their knowledge successfully. Results further revealed that the various combinations of rules and practice posed differential task demands on the learners and consequently drew on language aptitude and WM to a different extent. Since these correlations between individual differences and learning outcomes were the least observed in the conditions that received GE during practice, we argue that the suitable integration of rules and practice ameliorated task demands, reducing the burden on the learner, and accordingly mitigated the role of participants’ individual differences. Finally, some evidence also showed that the comprehension practice that participants received for the two structures was not sufficient for the formation of solid productive knowledge, but was more effective for the OV than for the SER construction.

Thermal Tracking and Estimation for Microprocessors

Due to increasing integration density and operating frequency of today's high performance processors, the temperature of a typical chip can easily exceed 100 degrees Celsius. However, the runtime thermal state of a chip is very hard to predict and manage due to the random nature in computing workloads, as well as the process, voltage and ambient temperature variability (together called PVT variability). The uneven nature (both in time and space) of the heat dissipation of the chip could lead to severe reliability issues and error-prone chip behavior (e.g. timing errors). Many dynamic power/thermal management techniques have been proposed to address this issue such as dynamic voltage and frequency scaling (DVFS), clock gating and etc. However, most of such techniques require accurate knowledge of the runtime thermal state of the chip to make efficient and effective control decisions. In this work we address the problem of tracking and managing the temperature of microprocessors which include the following sub-problems: (1) how to design an efficient sensor-based thermal tracking system on a given design that could provide accurate real-time temperature feedback; (2) what statistical techniques could be used to estimate the full-chip thermal profile based on very limited (and possibly noise-corrupted) sensor observations; (3) how do we adapt to changes in the underlying system's behavior, since such changes could impact the accuracy of our thermal estimation. The thermal tracking methodology proposed in this work is enabled by on-chip sensors which are already implemented in many modern processors. We first investigate the underlying relationship between heat distribution and power consumption, then we introduce an accurate thermal model for the chip system. Based on this model, we characterize the temperature correlation that exists among different chip modules and explore statistical approaches (such as those based on Kalman filter) that could utilize such correlation to estimate the accurate chip-level thermal profiles in real time. Such estimation is performed based on limited sensor information because sensors are usually resource constrained and noise-corrupted. We also took a further step to extend the standard Kalman filter approach to account for (1) nonlinear effects such as leakage-temperature interdependency and (2) varying statistical characteristics in the underlying system model. The proposed thermal tracking infrastructure and estimation algorithms could consistently generate accurate thermal estimates even when the system is switching among workloads that have very distinct characteristics. Through experiments, our approaches have demonstrated promising results with much higher accuracy compared to existing approaches. Such results can be used to ensure thermal reliability and improve the effectiveness of dynamic thermal management techniques.