Cyclic Pursuit: Symmetry, Reduction and Nonlinear Dynamics

In this dissertation, we explore the use of pursuit interactions as a building block for collective behavior, primarily in the context of constant bearing (CB) cyclic pursuit. Pursuit phenomena are observed throughout the natural environment and also play an important role in technological contexts, such as missile-aircraft encounters and interactions between unmanned vehicles. While pursuit is typically regarded as adversarial, we demonstrate that pursuit interactions within a cyclic pursuit framework give rise to seemingly coordinated group maneuvers. We model a system of agents (e.g. birds, vehicles) as particles tracing out curves in the plane, and illustrate reduction to the shape space of relative positions and velocities. Introducing the CB pursuit strategy and associated pursuit law, we consider the case for which agent i pursues agent i+1 (modulo n) with the CB pursuit law. After deriving closed-loop cyclic pursuit dynamics, we demonstrate asymptotic convergence to an invariant submanifold (corresponding to each agent attaining the CB pursuit strategy), and proceed by analysis of the reduced dynamics restricted to the submanifold. For the general setting, we derive existence conditions for relative equilibria (circling and rectilinear) as well as for system trajectories which preserve the shape of the collective (up to similarity), which we refer to as pure shape equilibria. For two illustrative low-dimensional cases, we provide a more comprehensive analysis, deriving explicit trajectory solutions for the two-particle "mutual pursuit" case, and detailing the stability properties of three-particle relative equilibria and pure shape equilibria. For the three-particle case, we show that a particular choice of CB pursuit parameters gives rise to remarkable almost-periodic trajectories in the physical space. We also extend our study to consider CB pursuit in three dimensions, deriving a feedback law for executing the CB pursuit strategy, and providing a detailed analysis of the two-particle mutual pursuit case. We complete the work by considering evasive strategies to counter the motion camouflage (MC) pursuit law. After demonstrating that a stochastically steering evader is unable to thwart the MC pursuit strategy, we propose a (deterministic) feedback law for the evader and demonstrate the existence of circling equilibria for the closed-loop pursuer-evader dynamics.

Security through Obscurity: Layout Obfuscation of Digital Integrated Circuits using Don't Care Conditions

Contemporary integrated circuits are designed and manufactured in a globalized environment leading to concerns of piracy, overproduction and counterfeiting. One class of techniques to combat these threats is circuit obfuscation which seeks to modify the gate-level (or structural) description of a circuit without affecting its functionality in order to increase the complexity and cost of reverse engineering. Most of the existing circuit obfuscation methods are based on the insertion of additional logic (called “key gates”) or camouflaging existing gates in order to make it difficult for a malicious user to get the complete layout information without extensive computations to determine key-gate values. However, when the netlist or the circuit layout, although camouflaged, is available to the attacker, he/she can use advanced logic analysis and circuit simulation tools and Boolean SAT solvers to reveal the unknown gate-level information without exhaustively trying all the input vectors, thus bringing down the complexity of reverse engineering. To counter this problem, some ‘provably secure’ logic encryption algorithms that emphasize methodical selection of camouflaged gates have been proposed previously in literature [1,2,3]. The contribution of this paper is the creation and simulation of a new layout obfuscation method that uses don't care conditions. We also present proof-of-concept of a new functional or logic obfuscation technique that not only conceals, but modifies the circuit functionality in addition to the gate-level description, and can be implemented automatically during the design process. Our layout obfuscation technique utilizes don’t care conditions (namely, Observability and Satisfiability Don’t Cares) inherent in the circuit to camouflage selected gates and modify sub-circuit functionality while meeting the overall circuit specification. Here, camouflaging or obfuscating a gate means replacing the candidate gate by a 4X1 Multiplexer which can be configured to perform all possible 2-input/ 1-output functions as proposed by Bao et al. [4]. It is important to emphasize that our approach not only obfuscates but alters sub-circuit level functionality in an attempt to make IP piracy difficult. The choice of gates to obfuscate determines the effort required to reverse engineer or brute force the design. As such, we propose a method of camouflaged gate selection based on the intersection of output logic cones. By choosing these candidate gates methodically, the complexity of reverse engineering can be made exponential, thus making it computationally very expensive to determine the true circuit functionality. We propose several heuristic algorithms to maximize the RE complexity based on don’t care based obfuscation and methodical gate selection. Thus, the goal of protecting the design IP from malicious end-users is achieved. It also makes it significantly harder for rogue elements in the supply chain to use, copy or replicate the same design with a different logic. We analyze the reverse engineering complexity by applying our obfuscation algorithm on ISCAS-85 benchmarks. Our experimental results indicate that significant reverse engineering complexity can be achieved at minimal design overhead (average area overhead for the proposed layout obfuscation methods is 5.51% and average delay overhead is about 7.732%). We discuss the strengths and limitations of our approach and suggest directions that may lead to improved logic encryption algorithms in the future. References: [1] R. Chakraborty and S. Bhunia, “HARPOON: An Obfuscation-Based SoC Design Methodology for Hardware Protection,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 10, pp. 1493–1502, 2009. [2] J. A. Roy, F. Koushanfar, and I. L. Markov, “EPIC: Ending Piracy of Integrated Circuits,” in 2008 Design, Automation and Test in Europe, 2008, pp. 1069–1074. [3] J. Rajendran, M. Sam, O. Sinanoglu, and R. Karri, “Security Analysis of Integrated Circuit Camouflaging,” ACM Conference on Computer Communications and Security, 2013. [4] Bao Liu, Wang, B., "Embedded reconfigurable logic for ASIC design obfuscation against supply chain attacks,"Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014 , vol., no., pp.1,6, 24-28 March 2014.