Improving Photovoltaics with High Luminescence Efficiency Quantum Dot Layers

A solar cell relies on its ability to turn photons into current. Because short wavelength photons are typically absorbed near the top surface of a cell, the generated charge carriers recombine before being collected. But when a layer of quantum dots (nanoscale semiconductor particles) is placed on top of the cell, it absorbs short wavelength photons and emits them into the cell at longer wavelengths, which enables more efficient carrier collection. However, the resulting power conversion efficiency of the system depends critically on the quantum dot luminescence efficiency – the nature of this relationship was previously unknown. Our calculations suggest that a quantum dot layer must have high luminescence efficiency (at least 80%) to improve the current output of existing photovoltaic (PV) cells; otherwise, it may worsen the cell’s efficiency. Our quantum dot layer (using quantum dots with over 85% quantum yield) slightly reduced the efficiency of our PV cells. We observed a decrease in short circuit current of a commercial-grade cell from 0.1977 A to 0.1826 A, a 7.6% drop, suggesting that improved optical coupling from the quantum dot emission into the solar cell is needed. With better optical coupling, we predict current enhancements between ~6% and ~8% for a solar cell that already has an antireflection coating. Such improvements could have important commercial impacts if the coating could be deployed in a scalable fashion.

Self-Assembled InAs/GaAs Quantum Dot Solar Cells

Our work focuses on experimental and theoretical studies aimed at establishing a fundamental understanding of the principal electrical and optical processes governing the operation of quantum dot solar cells (QDSC) and their feasibility for the realization of intermediate band solar cell (IBSC). Uniform performance QD solar cells with high conversion efficiency have been fabricated using carefully calibrated process recipes as the basis of all reliable experimental characterization. The origin for the enhancement of the short circuit current density (Jsc) in QD solar cells was carefully investigated. External quantum efficiency (EQE) measurements were performed as a measure of the below bandgap distribution of transition states. In this work, we found that the incorporation of self-assembled quantum dots (QDs) interrupts the lattice periodicity and introduce a greatly broadened tailing density of states extending from the bandedge towards mid-gap. A below-bandgap density of states (DOS) model with an extended Urbach tail has been developed. In particular, the below-bandgap photocurrent generation has been attributed to transitions via confined energy states and background continuum tailing states. Photoluminescence measurement is used to measure the energy level of the lowest available state and the coupling effect between QD states and background tailing states because it results from a non-equilibrium process. A basic I-V measurement reveals a degradation of the open circuit voltage (Voc) of QD solar cells, which is related to a one sub-bandgap photon absorption process followed by a direct collection of the generated carriers by the external circuit. We have proposed a modified Shockley-Queisser (SQ) model that predicts the degradation of Voc compared with a reference bulk device. Whenever an energy state within the forbidden gap can facilitate additional absorption, it can facilitate recombination as well. If the recombination is non-radiative, it is detrimental to solar cell performance. We have also investigated the QD trapping effects as deep level energy states. Without an efficient carrier extraction pathway, the QDs can indeed function as mobile carriers traps. Since hole energy levels are mostly connected with hole collection under room temperature, the trapping effect is more severe for electrons. We have tried to electron-dope the QDs to exert a repulsive Coulomb force to help improve the carrier collection efficiency. We have experimentally observed a 30% improvement of Jsc for 4e/dot devices compared with 0e/dot devices. Electron-doping helps with better carrier collection efficiency, however, we have also measured a smaller transition probability from valance band to QD states as a direct manifestation of the Pauli Exclusion Principle. The non-linear performance is of particular interest. With the availability of laser with on-resonance and off-resonance excitation energy, we have explored the photocurrent enhancement by a sequential two-photon absorption (2PA) process via the intermediate states. For the first time, we are able to distinguish the nonlinearity effect by 1PA and 2PA process. The observed 2PA current under off-resonant and on-resonant excitation comes from a two-step transition via the tailing states instead of the QD states. However, given the existence of an extended Urbach tail and the small number of photons available for the intermediate states to conduction band transition, the experimental results suggest that with the current material system, the intensity requirement for an observable enhancement of photocurrent via a 2PA process is much higher than what is available from concentrated sun light. In order to realize the IBSC model, a matching transition strength needs to be achieved between valance band to QD states and QD states to conduction band. However, we have experimentally shown that only a negligible amount of signal can be observed at cryogenic temperature via the transition from QD states to conduction band under a broadband IR source excitation. Based on the understanding we have achieved, we found that the existence of the extended tailing density of states together with the large mismatch of the transition strength from VB to QD and from QD to CB, has systematically put into question the feasibility of the IBSC model with QDs.

DEVELOPMENT OF LI+ AND NA+ CONDUCTING CERAMICS AND CERAMIC STRUCTURES FOR USE IN SOLID STATE BATTERIES

A solid state lithium metal battery based on a lithium garnet material was developed, constructed and tested. Specifically, a porous-dense-porous trilayer structure was fabricated by tape casting, a roll-to-roll technique conducive to high volume manufacturing. The high density and thin center layer (< 20 μm) effectively blocks dendrites even over hundreds of cycles. The microstructured porous layers, serving as electrode supports, are demonstrated to increase the interfacial surface area available to the electrodes and increase cathode loading. Reproducibility of flat, well sintered ceramics was achieved with consistent powderbed lattice parameter and ball milling of powderbed. Together, the resistance of the LLCZN trilayer was measured at an average of 7.6 ohm-cm2 in a symmetric lithium cell, significantly lower than any other reported literature results. Building on these results, a full cell with a lithium metal anode, LLCZN trilayer electrolyte, and LiCoO2 cathode was cycled 100 cycles without decay and an average ASR of 117 ohm-cm2. After cycling, the cell was held at open circuit for 24 hours without any voltage fade, demonstrating the absence of a dendrite or short-circuit of any type. Cost calculations guided the optimization of a trilayer structure predicted that resulting cells will be highly competitive in the marketplace as intrinsically safe lithium batteries with energy densities greater than 300 Wh/kg and 1000 Wh/L for under $100/kWh. Also in the pursuit of solid state batteries, an improved Na+ superionic conductor (NASICON) composition, Na3Zr2Si2PO12, was developed with a conductivity of 1.9x10-3 S/cm. New super-lithiated lithium garnet compositions, Li7.06La3Zr1.94Y0.06O12 and Li7.16La3Zr1.84Y0.16O12, were developed and studied revealing insights about the mechanisms of conductivity in lithium garnets.

Surface Insulation Resistance Degradation and Electrochemical Migration on Printed Circuit Boards

Widespread adoption of lead-free materials and processing for printed circuit board (PCB) assembly has raised reliability concerns regarding surface insulation resistance (SIR) degradation and electrochemical migration (ECM). As PCB conductor spacings decrease, electronic products become more susceptible to these failures mechanisms, especially in the presence of surface contamination and flux residues which might remain after no-clean processing. Moreover, the probability of failure due to SIR degradation and ECM is affected by the interaction between physical factors (such as temperature, relative humidity, electric field) and chemical factors (such as solder alloy, substrate material, no-clean processing). Current industry standards for assessing SIR reliability are designed to serve as short-term qualification tests, typically lasting 72 to 168 hours, and do not provide a prediction of reliability in long-term applications. The risk of electrochemical migration with lead-free assemblies has not been adequately investigated. Furthermore, the mechanism of electrochemical migration is not completely understood. For example, the role of path formation has not been discussed in previous studies. Another issue is that there are very few studies on development of rapid assessment methodologies for characterizing materials such as solder flux with respect to their potential for promoting ECM. In this dissertation, the following research accomplishments are described: 1). Long-term temp-humidity-bias (THB) testing over 8,000 hours assessing the reliability of printed circuit boards processed with a variety of lead-free solder pastes, solder pad finishes, and substrates. 2). Identification of silver migration from Sn3.5Ag and Sn3.0Ag0.5Cu lead-free solder, which is a completely new finding compared with previous research. 3). Established the role of path formation as a step in the ECM process, and provided clarification of the sequence of individual steps in the mechanism of ECM: path formation, electrodeposition, ion transport, electrodeposition, and filament formation. 4). Developed appropriate accelerated testing conditions for assessing the no-clean processed PCBs' susceptibility to ECM: a). Conductor spacings in test structures should be reduced in order to reflect the trend of higher density electronics and the effect of path formation, independent of electric field, on the time-to-failure. b). THB testing temperatures should be modified according to the material present on the PCB, since testing at 85oC can cause the evaporation of weak organic acids (WOAs) in the flux residues, leading one to underestimate the risk of ECM. 5). Correlated temp-humidity-bias testing with ion chromatography analysis and potentiostat measurement to develop an efficient and effective assessment methodology to characterize the effect of no-clean processing on ECM.