Can Cooling Technology Save Many-Core Parallel Programming from Its Programming Woes?

An abstract of this work will be presented at the Compiler, Architecture and Tools Conference (CATC), Intel Development Center, Haifa, Israel November 23, 2015.

Slot Film Cooling: A Comprehensive Experimental Characterization

When components of a propulsion system are exposed to elevated flow temperatures there is a risk for catastrophic failure if the components are not properly protected from the thermal loads. Among several strategies, slot film cooling is one of the most commonly used, yet poorly understood active cooling techniques. Tangential injection of a relatively cool fluid layer protects the surface(s) in question, but the turbulent mixing between the hot mainstream and cooler film along with the presence of the wall presents an inherently complex problem where kinematics, thermal transport and multimodal heat transfer are coupled. Furthermore, new propulsion designs rely heavily on CFD analysis to verify their viability. These CFD models require validation of their results, and the current literature does not provide a comprehensive data set for film cooling that meets all the demands for proper validation, namely a comprehensive (kinematic, thermal and boundary condition data) data set obtained over a wide range of conditions. This body of work aims at solving the fundamental issue of validation by providing high quality comprehensive film cooling data (kinematics, thermal mixing, heat transfer). 3 distinct velocity ratios (VR=uc/u∞) are examined corresponding to wall-wake (VR~0.5), min-shear (VR ~ 1.0), and wall-jet (VR~2.0) type flows at injection, while the temperature ratio TR= T∞/Tc is approximately 1.5 for all cases. Turbulence intensities at injection are 2-4% for the mainstream (urms/u∞, vrms/u∞,), and on the order of 8-10% for the coolant (urms/uc, vrms/uc,). A special emphasis is placed on inlet characterization, since inlet data in the literature is often incomplete or is of relatively low quality for CFD development. The data reveals that min-shear injection provides the best performance, followed by the wall-jet. The wall-wake case is comparably poor in performance. The comprehensive data suggests that this relative performance is due to the mixing strength of each case, as well as the location of regions of strong mixing with respect to the wall. Kinematic and thermal data show that strong mixing occurs in the wall-jet away from the wall (y/s>1), while strong mixing in the wall-wake occurs much closer to the wall (y/s<1). Min-shear cases exhibit noticeably weaker mixing confined to about y/s=1. Additionally to these general observations, the experimental data obtained in this work is analyzed to reveal scaling laws for the inlets, near-wall scaling, detecting and characterizing coherent structures in the flow as well as to provide data reduction strategies for comparison to CFD models (RANS and LES).

Architectural-Physical Co-Design of 3D CPUs with Micro-Fluidic Cooling

The performance, energy efficiency and cost improvements due to traditional technology scaling have begun to slow down and present diminishing returns. Underlying reasons for this trend include fundamental physical limits of transistor scaling, the growing significance of quantum effects as transistors shrink, and a growing mismatch between transistors and interconnects regarding size, speed and power. Continued Moore's Law scaling will not come from technology scaling alone, and must involve improvements to design tools and development of new disruptive technologies such as 3D integration. 3D integration presents potential improvements to interconnect power and delay by translating the routing problem into a third dimension, and facilitates transistor density scaling independent of technology node. Furthermore, 3D IC technology opens up a new architectural design space of heterogeneously-integrated high-bandwidth CPUs. Vertical integration promises to provide the CPU architectures of the future by integrating high performance processors with on-chip high-bandwidth memory systems and highly connected network-on-chip structures. Such techniques can overcome the well-known CPU performance bottlenecks referred to as memory and communication wall. However the promising improvements to performance and energy efficiency offered by 3D CPUs does not come without cost, both in the financial investments to develop the technology, and the increased complexity of design. Two main limitations to 3D IC technology have been heat removal and TSV reliability. Transistor stacking creates increases in power density, current density and thermal resistance in air cooled packages. Furthermore the technology introduces vertical through silicon vias (TSVs) that create new points of failure in the chip and require development of new BEOL technologies. Although these issues can be controlled to some extent using thermal-reliability aware physical and architectural 3D design techniques, high performance embedded cooling schemes, such as micro-fluidic (MF) cooling, are fundamentally necessary to unlock the true potential of 3D ICs. A new paradigm is being put forth which integrates the computational, electrical, physical, thermal and reliability views of a system. The unification of these diverse aspects of integrated circuits is called Co-Design. Independent design and optimization of each aspect leads to sub-optimal designs due to a lack of understanding of cross-domain interactions and their impacts on the feasibility region of the architectural design space. Co-Design enables optimization across layers with a multi-domain view and thus unlocks new high-performance and energy efficient configurations. Although the co-design paradigm is becoming increasingly necessary in all fields of IC design, it is even more critical in 3D ICs where, as we show, the inter-layer coupling and higher degree of connectivity between components exacerbates the interdependence between architectural parameters, physical design parameters and the multitude of metrics of interest to the designer (i.e. power, performance, temperature and reliability). In this dissertation we present a framework for multi-domain co-simulation and co-optimization of 3D CPU architectures with both air and MF cooling solutions. Finally we propose an approach for design space exploration and modeling within the new Co-Design paradigm, and discuss the possible avenues for improvement of this work in the future.