Synthesis and characterization of cyclotriphosphazenes containing silicon as single solid-state precursors for the formation of silicon/phosphorus nanostructured materials

The synthesis and characterization of new organosilicon derivatives of N3P3Cl6, N3P3[NH(CH2)3Si(OEt)3]6 (1), N3P3[NH(CH2)3Si(OEt)3]3[NCH3(CH2)3CN]3 (2), and N3P3[NH(CH2)3Si(OEt)3]3[HOC6H4(CH2)CN]3 (3) are reported. Pyrolysis of 1, 2, and 3 in air and at several temperatures results in nanostructured materials whose composition and morphology depend on the temperature of pyrolysis and the substituents of the phosphazenes ring. The products stem from the reaction of SiO2 with P2O5, leading to either crystalline Si5(PO4)6O, SiP2O7 or an amorphous phase as the glass Si5(PO4)6O/3SiO2·2P2O5, depending on the temperature and nature of the trimer precursors. From 1 at 800 °C, core−shell microspheres of SiO2 coated with Si5(PO4)6O are obtained, while in other cases, mesoporous or dense structures are observed. Atomic force microscopy examination after deposition of the materials on monocrystalline silicon wafers evidences morphology strongly dependent on the precursors. Isolated islands of size ∼9 nm are observed from 1, whereas dense nanostructures with a mean height of 13 nm are formed from 3. Brunauer−Emmett−Teller measurements show mesoporous materials with low surface areas. The proposed growth mechanism involves the formation of cross-linking structures and of vacancies by carbonization of the organic matter, where the silicon compounds nucleate. Thus, for the first time, unique silicon nanostructured materials are obtained from cyclic phosphazenes containing silicon.

Investigating routes toward atomic layer deposition of silicon carbide: Ab initio screening of potential silicon and carbon precursors

Silicon carbide (SiC) is a promising material for electronics due to its hardness, and ability to carry high currents and high operating temperature. SiC films are currently deposited using chemical vapor deposition (CVD) at high temperatures 1500–1600 °C. However, there is a need to deposit SiC-based films on the surface of high aspect ratio features at low temperatures. One of the most precise thin film deposition techniques on high-aspect-ratio surfaces that operates at low temperatures is atomic layer deposition (ALD). However, there are currently no known methods for ALD of SiC. Herein, the authors present a first-principles thermodynamic analysis so as to screen different precursor combinations for SiC thin films. The authors do this by calculating the Gibbs energy ΔGΔG of the reaction using density functional theory and including the effects of pressure and temperature. This theoretical model was validated for existing chemical reactions in CVD of SiC at 1000 °C. The precursors disilane (Si2H6), silane (SiH4), or monochlorosilane (SiH3Cl) with ethyne (C2H2), carbontetrachloride (CCl4), or trichloromethane (CHCl3) were predicted to be the most promising for ALD of SiC at 400 °C.

Development of germanium/silicon integration for near infrared detection

Silicon (Si) is the base material for electronic technologies and is emerging as a very attractive platform for photonic integrated circuits (PICs). PICs allow optical systems to be made more compact with higher performance than discrete optical components. Applications for PICs are in the area of fibre-optic communication, biomedical devices, photovoltaics and imaging. Germanium (Ge), due to its suitable bandgap for telecommunications and its compatibility with Si technology is preferred over III-V compounds as an integrated on-chip detector at near infrared wavelengths. There are two main approaches for Ge/Si integration: through epitaxial growth and through direct wafer bonding. The lattice mismatch of ~4.2% between Ge and Si is the main problem of the former technique which leads to a high density of dislocations while the bond strength and conductivity of the interface are the main challenges of the latter. Both result in trap states which are expected to play a critical role. Understanding the physics of the interface is a key contribution of this thesis. This thesis investigates Ge/Si diodes using these two methods. The effects of interface traps on the static and dynamic performance of Ge/Si avalanche photodetectors have been modelled for the first time. The thesis outlines the original process development and characterization of mesa diodes which were fabricated by transferring a ~700 nm thick layer of p-type Ge onto n-type Si using direct wafer bonding and layer exfoliation. The effects of low temperature annealing on the device performance and on the conductivity of the interface have been investigated. It is shown that the diode ideality factor and the series resistance of the device are reduced after annealing. The carrier transport mechanism is shown to be dominated by generation–recombination before annealing and by direct tunnelling in forward bias and band-to-band tunnelling in reverse bias after annealing. The thesis presents a novel technique to realise photodetectors where one of the substrates is thinned by chemical mechanical polishing (CMP) after bonding the Si-Ge wafers. Based on this technique, Ge/Si detectors with remarkably high responsivities, in excess of 3.5 A/W at 1.55 μm at −2 V, under surface normal illumination have been measured. By performing electrical and optical measurements at various temperatures, the carrier transport through the hetero-interface is analysed by monitoring the Ge band bending from which a detailed band structure of the Ge/Si interface is proposed for the first time. The above unity responsivity of the detectors was explained by light induced potential barrier lowering at the interface. To our knowledge this is the first report of light-gated responsivity for vertically illuminated Ge/Si photodiodes. The wafer bonding approach followed by layer exfoliation or by CMP is a low temperature wafer scale process. In principle, the technique could be extended to other materials such as Ge on GaAs, or Ge on SOI. The unique results reported here are compatible with surface normal illumination and are capable of being integrated with CMOS electronics and readout units in the form of 2D arrays of detectors. One potential future application is a low-cost Si process-compatible near infrared camera.