Leaf galls in our native trees and shrubs

Plant galls constitute a branch of study and research which has been to me a subject of much interest for some time. At the start of this work, it was intended to include Plant galls in general, but after some months this was found to be too comprehensive a field and would in fact take a great many years to study fully. Even leaf galls alone, both of herbs and trees provide so large a field of investigation that ultimately I decided to confine my attention to those or our native trees and shrubs. Upon looking up the literature on this subject, it will be found that in nearly all cases, either the gall is described fully and mere mention made or the agent concerned in its production, or vice versa. This state of things is most unsatisfactory, as in studying galls, both the gall-maker and the gall formation must be examined in detail before it is safe to apply nomenclature. This work, therefore, sets out to give accurate and scientific descriptions of both galls and gall-makers. The difficulties encountered are manifold; firstly, our trees are all deciduous, hence, the collecting period is necessarily restricted to that time of the year between the appearance of the buds and the fall of the leaf. Secondly, the rearing of imagines is always difficult, especially in the case or the autumn gall; more will be said on this matter later. Lastly, due to war-time conditions much trouble was experienced in obtaining suitable literature and many invaluable books on this subject were unprocurable. The Plates at the back have all been copied from original material except in the case or the Phytoptid mites which have been sketched with the help of illustrations, the reason for this being the difficulty of making suitable mounts of these minute creatures, Where possible all stages or at least larva and imago have been sketched, together with the host plant and the type of gall-formation produced. Slides have also been made of most larvae and the imagines attached to cards and pinned on to pith or cork in the usual manner.

Hardware design of cryptographic accelerators

With the rapid growth of the Internet and digital communications, the volume of sensitive electronic transactions being transferred and stored over and on insecure media has increased dramatically in recent years. The growing demand for cryptographic systems to secure this data, across a multitude of platforms, ranging from large servers to small mobile devices and smart cards, has necessitated research into low cost, flexible and secure solutions. As constraints on architectures such as area, speed and power become key factors in choosing a cryptosystem, methods for speeding up the development and evaluation process are necessary. This thesis investigates flexible hardware architectures for the main components of a cryptographic system. Dedicated hardware accelerators can provide significant performance improvements when compared to implementations on general purpose processors. Each of the designs proposed are analysed in terms of speed, area, power, energy and efficiency. Field Programmable Gate Arrays (FPGAs) are chosen as the development platform due to their fast development time and reconfigurable nature. Firstly, a reconfigurable architecture for performing elliptic curve point scalar multiplication on an FPGA is presented. Elliptic curve cryptography is one such method to secure data, offering similar security levels to traditional systems, such as RSA, but with smaller key sizes, translating into lower memory and bandwidth requirements. The architecture is implemented using different underlying algorithms and coordinates for dedicated Double-and-Add algorithms, twisted Edwards algorithms and SPA secure algorithms, and its power consumption and energy on an FPGA measured. Hardware implementation results for these new algorithms are compared against their software counterparts and the best choices for minimum area-time and area-energy circuits are then identified and examined for larger key and field sizes. Secondly, implementation methods for another component of a cryptographic system, namely hash functions, developed in the recently concluded SHA-3 hash competition are presented. Various designs from the three rounds of the NIST run competition are implemented on FPGA along with an interface to allow fair comparison of the different hash functions when operating in a standardised and constrained environment. Different methods of implementation for the designs and their subsequent performance is examined in terms of throughput, area and energy costs using various constraint metrics. Comparing many different implementation methods and algorithms is nontrivial. Another aim of this thesis is the development of generic interfaces used both to reduce implementation and test time and also to enable fair baseline comparisons of different algorithms when operating in a standardised and constrained environment. Finally, a hardware-software co-design cryptographic architecture is presented. This architecture is capable of supporting multiple types of cryptographic algorithms and is described through an application for performing public key cryptography, namely the Elliptic Curve Digital Signature Algorithm (ECDSA). This architecture makes use of the elliptic curve architecture and the hash functions described previously. These components, along with a random number generator, provide hardware acceleration for a Microblaze based cryptographic system. The trade-off in terms of performance for flexibility is discussed using dedicated software, and hardware-software co-design implementations of the elliptic curve point scalar multiplication block. Results are then presented in terms of the overall cryptographic system.

Investigation of toll-like receptor tolerance in the regulation of inflammation

Inflammation is a complex and highly organised immune response to microbes and tissue injury. Recognition of noxious stimuli by pathogen recognition receptor families including Toll-like receptors results in the expression of hundreds of genes that encode cytokines, chemokines, antimicrobials and regulators of inflammation. Regulation of TLR activation responses is controlled by TLR tolerance which induces a global change in the cellular transcriptional expression profile resulting in gene specific suppression and induction of transcription. In this thesis the plasticity of TLR receptor tolerance is investigated using an in vivo, transcriptomics and functional approach to determine the plasticity of TLR tolerance in the regulation of inflammation. Firstly, using mice deficient in the negative regulator of TLR gene transcription, Bcl-3 (Bcl-3-/-) in a model of intestinal inflammation, we investigated the role of Bcl-3 in the regulation of intestinal inflammatory responses. Our data revealed a novel role for Bcl-3 in the regulation of epithelial cell proliferation and regeneration during intestinal inflammation. Furthermore this data revealed that increased Bcl-3 expression contributes to the development of inflammatory bowel disease (IBD). Secondly, we demonstrate that lipopolysaccharide tolerance is transient and recovery from LPS tolerance results in polarisation of macrophages to a previously un-described hybrid state (RM). In addition, we identified that RM cells have a unique transcriptional profile with suppression and induction of genes specific to this polarisation state. Furthermore, using a functional approach to characterise the outcomes of TLR tolerance plasticity, we demonstrate that cytokine transcription is uncoupled from cytokine secretion in macrophages following recovery from LPS tolerance. Here we demonstrate a novel mechanism of regulation of TLR tolerance through suppression of cytokine secretion in macrophages. We show that TNF-α is alternatively trafficked towards a degradative intracellular compartment. These studies demonstrate that TLR tolerance is a complex immunological response with the plasticity of this state playing an important role in the regulation of inflammation.

Analysis and optimisation of semiconductor reflective modulators for optical networks

Reflective modulators based on the combination of an electroabsorption modulator (EAM) and semiconductor optical amplifier (SOA) are attractive devices for applications in long reach carrier distributed passive optical networks (PONs) due to the gain provided by the SOA and the high speed and low chirp modulation of the EAM. Integrated R-EAM-SOAs have experimentally shown two unexpected and unintuitive characteristics which are not observed in a single pass transmission SOA: the clamping of the output power of the device around a maximum value and low patterning distortion despite the SOA being in a regime of gain saturation. In this thesis a detailed analysis is carried out using both experimental measurements and modelling in order to understand these phenomena. For the first time it is shown that both the internal loss between SOA and R-EAM and the SOA gain play an integral role in the behaviour of gain saturated R-EAM-SOAs. Internal loss and SOA gain are also optimised for use in a carrier distributed PONs in order to access both the positive effect of output power clamping, and hence upstream dynamic range reduction, combined with low patterning operation of the SOA Reflective concepts are also gaining interest for metro transport networks and short reach, high bit rate, inter-datacentre links. Moving the optical carrier generation away from the transmitter also has potential advantages for these applications as it avoids the need for cooled photonics being placed directly on hot router line-cards. A detailed analysis is carried out in this thesis on a novel colourless reflective duobinary modulator, which would enable wavelength flexibility in a power-efficient reflective metro node.

"Farò quel che me piacerà": Fictional women in villotta voice resistance

Published Version