Optimisation of chemoenzymatic processes in asymmetric synthesis

This thesis describes the optimisation of chemoenzymatic methods in asymmetric synthesis. Modern synthetic organic chemistry has experienced an enormous growth in biocatalytic methodologies; enzymatic transformations and whole cell bioconversions have become generally accepted synthetic tools for asymmetric synthesis. Biocatalysts are exceptional catalysts, combining broad substrate scope with high regio-, enantio- and chemoselectivities enabling the resolution of organic substrates with superb efficiency and selectivity. In this study three biocatalytic applications in enantioselective synthesis were explored and perhaps the most significant outcome of this work is the excellent enantioselectivity achieved through optimisation of reaction conditions improving the synthetic utility of the biotransformations. In the first chapter a summary of literature discussing the stereochemical control of baker’s yeast (Saccharomyces Cerevisae) mediated reduction of ketones by the introduction of sulfur moieties is presented, and sets the work of Chapter 2 in context. The focus of the second chapter was the synthesis and biocatalytic resolution of (±)-trans-2-benzenesulfonyl-3-n-butylcyclopentanone. For the first time the practical limitations of this resolution have been addressed providing synthetically useful quantities of enantiopure synthons for application in the total synthesis of both enantiomers of 4-methyloctanoic acid, the aggregation pheromone of the rhinoceros beetles of the genus Oryctes. The unique aspect of this enantioselective synthesis was the overall regio- and enantioselective introduction of the methyl group to the octanoic acid chain. This work is part of an ongoing research programme in our group focussed on baker’s yeast mediated kinetic resolution of 2-keto sulfones. The third chapter describes hydrolase-catalysed kinetic resolutions leading to a series of 3-aryl alkanoic acids. Hydrolysis of the ethyl esters with a series of hydrolases was undertaken to identify biocatalysts that yield the corresponding acids in highly enantioenriched form. Contrary to literature reports where a complete disappearance of efficiency and, accordingly enantioselection, was described upon kinetic resolution of sterically demanding 3-arylalkanoic acids, the highest reported enantiopurities of these acids was achieved (up to >98% ee) in this study through optimisation of reaction conditions. Steric and electronic effects on the efficiency and enantioselectivity of the biocatalytic transformation were also explored. Furthermore, a novel approach to determine the absolute stereochemistry of the enantiopure 3-aryl alkanoic acids was investigated through combination of co-crystallisation and X-ray diffraction linked with chiral HPLC analysis. The fourth chapter was focused on the development of a biocatalytic protocol for the asymmetric Henry reaction. Efficient kinetic resolution in hydrolase-mediated transesterification of cis- and trans- β-nitrocyclohexanol derivatives was achieved. Combination of a base-catalysed intramolecular Henry reaction coupled with the hydrolase-mediated kinetic resolution with the view to selective acetylation of a single stereoisomer was investigated. While dynamic kinetic resolution in the intramolecular Henry was not achieved, significant progress in each of the individual elements was made and significantly the feasibility of this process has been demonstrated. The final chapter contains the full experimental details, including spectroscopic and analytical data of all compounds synthesised in this project, while details of chiral HPLC analysis are included in the appendix. The data for the crystal structures are contained in the attached CD.

Systematic delay-driven power optimisation and power-driven delay optimisation of combinational circuits

With the proliferation of mobile wireless communication and embedded systems, the energy efficiency becomes a major design constraint. The dissipated energy is often referred as the product of power dissipation and the input-output delay. Most of electronic design automation techniques focus on optimising only one of these parameters either power or delay. Industry standard design flows integrate systematic methods of optimising either area or timing while for power consumption optimisation one often employs heuristics which are characteristic to a specific design. In this work we answer three questions in our quest to provide a systematic approach to joint power and delay Optimisation. The first question of our research is: How to build a design flow which incorporates academic and industry standard design flows for power optimisation? To address this question, we use a reference design flow provided by Synopsys and integrate in this flow academic tools and methodologies. The proposed design flow is used as a platform for analysing some novel algorithms and methodologies for optimisation in the context of digital circuits. The second question we answer is: Is possible to apply a systematic approach for power optimisation in the context of combinational digital circuits? The starting point is a selection of a suitable data structure which can easily incorporate information about delay, power, area and which then allows optimisation algorithms to be applied. In particular we address the implications of a systematic power optimisation methodologies and the potential degradation of other (often conflicting) parameters such as area or the delay of implementation. Finally, the third question which this thesis attempts to answer is: Is there a systematic approach for multi-objective optimisation of delay and power? A delay-driven power and power-driven delay optimisation is proposed in order to have balanced delay and power values. This implies that each power optimisation step is not only constrained by the decrease in power but also the increase in delay. Similarly, each delay optimisation step is not only governed with the decrease in delay but also the increase in power. The goal is to obtain multi-objective optimisation of digital circuits where the two conflicting objectives are power and delay. The logic synthesis and optimisation methodology is based on AND-Inverter Graphs (AIGs) which represent the functionality of the circuit. The switching activities and arrival times of circuit nodes are annotated onto an AND-Inverter Graph under the zero and a non-zero-delay model. We introduce then several reordering rules which are applied on the AIG nodes to minimise switching power or longest path delay of the circuit at the pre-technology mapping level. The academic Electronic Design Automation (EDA) tool ABC is used for the manipulation of AND-Inverter Graphs. We have implemented various combinatorial optimisation algorithms often used in Electronic Design Automation such as Simulated Annealing and Uniform Cost Search Algorithm. Simulated Annealing (SMA) is a probabilistic meta heuristic for the global optimization problem of locating a good approximation to the global optimum of a given function in a large search space. We used SMA to probabilistically decide between moving from one optimised solution to another such that the dynamic power is optimised under given delay constraints and the delay is optimised under given power constraints. A good approximation to the global optimum solution of energy constraint is obtained. Uniform Cost Search (UCS) is a tree search algorithm used for traversing or searching a weighted tree, tree structure, or graph. We have used Uniform Cost Search Algorithm to search within the AIG network, a specific AIG node order for the reordering rules application. After the reordering rules application, the AIG network is mapped to an AIG netlist using specific library cells. Our approach combines network re-structuring, AIG nodes reordering, dynamic power and longest path delay estimation and optimisation and finally technology mapping to an AIG netlist. A set of MCNC Benchmark circuits and large combinational circuits up to 100,000 gates have been used to validate our methodology. Comparisons for power and delay optimisation are made with the best synthesis scripts used in ABC. Reduction of 23% in power and 15% in delay with minimal overhead is achieved, compared to the best known ABC results. Also, our approach is also implemented on a number of processors with combinational and sequential components and significant savings are achieved.

An investigation on the use of SNR distributions for the optimisation of coarse-fine spectrum sensing for cognitive radio

This thesis investigates the optimisation of Coarse-Fine (CF) spectrum sensing architectures under a distribution of SNRs for Dynamic Spectrum Access (DSA). Three different detector architectures are investigated: the Coarse-Sorting Fine Detector (CSFD), the Coarse-Deciding Fine Detector (CDFD) and the Hybrid Coarse-Fine Detector (HCFD). To date, the majority of the work on coarse-fine spectrum sensing for cognitive radio has focused on a single value for the SNR. This approach overlooks the key advantage that CF sensing has to offer, namely that high powered signals can be easily detected without extra signal processing. By considering a range of SNR values, the detector can be optimised more effectively and greater performance gains realised. This work considers the optimisation of CF spectrum sensing schemes where the security and performance are treated separately. Instead of optimising system performance at a single, constant, low SNR value, the system instead is optimised for the average operating conditions. The security is still provided such that at the low SNR values the safety specifications are met. By decoupling the security and performance, the system’s average performance increases whilst maintaining the protection of licensed users from harmful interference. The different architectures considered in this thesis are investigated in theory, simulation and physical implementation to provide a complete overview of the performance of each system. This thesis provides a method for estimating SNR distributions which is quick, accurate and relatively low cost. The CSFD is modelled and the characteristic equations are found for the CDFD scheme. The HCFD is introduced and optimisation schemes for all three architectures are proposed. Finally, using the Implementing Radio In Software (IRIS) test-bed to confirm simulation results, CF spectrum sensing is shown to be significantly quicker than naive methods, whilst still meeting the required interference probability rates and not requiring substantial receiver complexity increases.