Systematic delay-driven power optimisation and power-driven delay optimisation of combinational circuits

With the proliferation of mobile wireless communication and embedded systems, the energy efficiency becomes a major design constraint. The dissipated energy is often referred as the product of power dissipation and the input-output delay. Most of electronic design automation techniques focus on optimising only one of these parameters either power or delay. Industry standard design flows integrate systematic methods of optimising either area or timing while for power consumption optimisation one often employs heuristics which are characteristic to a specific design. In this work we answer three questions in our quest to provide a systematic approach to joint power and delay Optimisation. The first question of our research is: How to build a design flow which incorporates academic and industry standard design flows for power optimisation? To address this question, we use a reference design flow provided by Synopsys and integrate in this flow academic tools and methodologies. The proposed design flow is used as a platform for analysing some novel algorithms and methodologies for optimisation in the context of digital circuits. The second question we answer is: Is possible to apply a systematic approach for power optimisation in the context of combinational digital circuits? The starting point is a selection of a suitable data structure which can easily incorporate information about delay, power, area and which then allows optimisation algorithms to be applied. In particular we address the implications of a systematic power optimisation methodologies and the potential degradation of other (often conflicting) parameters such as area or the delay of implementation. Finally, the third question which this thesis attempts to answer is: Is there a systematic approach for multi-objective optimisation of delay and power? A delay-driven power and power-driven delay optimisation is proposed in order to have balanced delay and power values. This implies that each power optimisation step is not only constrained by the decrease in power but also the increase in delay. Similarly, each delay optimisation step is not only governed with the decrease in delay but also the increase in power. The goal is to obtain multi-objective optimisation of digital circuits where the two conflicting objectives are power and delay. The logic synthesis and optimisation methodology is based on AND-Inverter Graphs (AIGs) which represent the functionality of the circuit. The switching activities and arrival times of circuit nodes are annotated onto an AND-Inverter Graph under the zero and a non-zero-delay model. We introduce then several reordering rules which are applied on the AIG nodes to minimise switching power or longest path delay of the circuit at the pre-technology mapping level. The academic Electronic Design Automation (EDA) tool ABC is used for the manipulation of AND-Inverter Graphs. We have implemented various combinatorial optimisation algorithms often used in Electronic Design Automation such as Simulated Annealing and Uniform Cost Search Algorithm. Simulated Annealing (SMA) is a probabilistic meta heuristic for the global optimization problem of locating a good approximation to the global optimum of a given function in a large search space. We used SMA to probabilistically decide between moving from one optimised solution to another such that the dynamic power is optimised under given delay constraints and the delay is optimised under given power constraints. A good approximation to the global optimum solution of energy constraint is obtained. Uniform Cost Search (UCS) is a tree search algorithm used for traversing or searching a weighted tree, tree structure, or graph. We have used Uniform Cost Search Algorithm to search within the AIG network, a specific AIG node order for the reordering rules application. After the reordering rules application, the AIG network is mapped to an AIG netlist using specific library cells. Our approach combines network re-structuring, AIG nodes reordering, dynamic power and longest path delay estimation and optimisation and finally technology mapping to an AIG netlist. A set of MCNC Benchmark circuits and large combinational circuits up to 100,000 gates have been used to validate our methodology. Comparisons for power and delay optimisation are made with the best synthesis scripts used in ABC. Reduction of 23% in power and 15% in delay with minimal overhead is achieved, compared to the best known ABC results. Also, our approach is also implemented on a number of processors with combinational and sequential components and significant savings are achieved.

Hardware design of cryptographic accelerators

With the rapid growth of the Internet and digital communications, the volume of sensitive electronic transactions being transferred and stored over and on insecure media has increased dramatically in recent years. The growing demand for cryptographic systems to secure this data, across a multitude of platforms, ranging from large servers to small mobile devices and smart cards, has necessitated research into low cost, flexible and secure solutions. As constraints on architectures such as area, speed and power become key factors in choosing a cryptosystem, methods for speeding up the development and evaluation process are necessary. This thesis investigates flexible hardware architectures for the main components of a cryptographic system. Dedicated hardware accelerators can provide significant performance improvements when compared to implementations on general purpose processors. Each of the designs proposed are analysed in terms of speed, area, power, energy and efficiency. Field Programmable Gate Arrays (FPGAs) are chosen as the development platform due to their fast development time and reconfigurable nature. Firstly, a reconfigurable architecture for performing elliptic curve point scalar multiplication on an FPGA is presented. Elliptic curve cryptography is one such method to secure data, offering similar security levels to traditional systems, such as RSA, but with smaller key sizes, translating into lower memory and bandwidth requirements. The architecture is implemented using different underlying algorithms and coordinates for dedicated Double-and-Add algorithms, twisted Edwards algorithms and SPA secure algorithms, and its power consumption and energy on an FPGA measured. Hardware implementation results for these new algorithms are compared against their software counterparts and the best choices for minimum area-time and area-energy circuits are then identified and examined for larger key and field sizes. Secondly, implementation methods for another component of a cryptographic system, namely hash functions, developed in the recently concluded SHA-3 hash competition are presented. Various designs from the three rounds of the NIST run competition are implemented on FPGA along with an interface to allow fair comparison of the different hash functions when operating in a standardised and constrained environment. Different methods of implementation for the designs and their subsequent performance is examined in terms of throughput, area and energy costs using various constraint metrics. Comparing many different implementation methods and algorithms is nontrivial. Another aim of this thesis is the development of generic interfaces used both to reduce implementation and test time and also to enable fair baseline comparisons of different algorithms when operating in a standardised and constrained environment. Finally, a hardware-software co-design cryptographic architecture is presented. This architecture is capable of supporting multiple types of cryptographic algorithms and is described through an application for performing public key cryptography, namely the Elliptic Curve Digital Signature Algorithm (ECDSA). This architecture makes use of the elliptic curve architecture and the hash functions described previously. These components, along with a random number generator, provide hardware acceleration for a Microblaze based cryptographic system. The trade-off in terms of performance for flexibility is discussed using dedicated software, and hardware-software co-design implementations of the elliptic curve point scalar multiplication block. Results are then presented in terms of the overall cryptographic system.

Integration of micro- and macroscopic models for pedestrian evacuation simulation

Simulation of pedestrian evacuations of smart buildings in emergency is a powerful tool for building analysis, dynamic evacuation planning and real-time response to the evolving state of evacuations. Macroscopic pedestrian models are low-complexity models that are and well suited to algorithmic analysis and planning, but are quite abstract. Microscopic simulation models allow for a high level of simulation detail but can be computationally intensive. By combining micro- and macro- models we can use each to overcome the shortcomings of the other and enable new capability and applications for pedestrian evacuation simulation that would not be possible with either alone. We develop the EvacSim multi-agent pedestrian simulator and procedurally generate macroscopic flow graph models of building space, integrating micro- and macroscopic approaches to simulation of the same emergency space. By “coupling” flow graph parameters to microscopic simulation results, the graph model captures some of the higher detail and fidelity of the complex microscopic simulation model. The coupled flow graph is used for analysis and prediction of the movement of pedestrians in the microscopic simulation, and investigate the performance of dynamic evacuation planning in simulated emergencies using a variety of strategies for allocation of macroscopic evacuation routes to microscopic pedestrian agents. The predictive capability of the coupled flow graph is exploited for the decomposition of microscopic simulation space into multiple future states in a scalable manner. By simulating multiple future states of the emergency in short time frames, this enables sensing strategy based on simulation scenario pattern matching which we show to achieve fast scenario matching, enabling rich, real-time feedback in emergencies in buildings with meagre sensing capabilities.

Pyramidal quantum dots: single and entangled photon sources and correlation studies

Practical realisation of quantum information science is a challenge being addressed by researchers employing various technologies. One of them is based on quantum dots (QD), usually referred to as artificial atoms. Being capable to emit single and polarization entangled photons, they are attractive as sources of quantum bits (qubits) which can be relatively easily integrated into photonic circuits using conventional semiconductor technologies. However, the dominant self-assembled QD systems suffer from asymmetry related problems which modify the energetic structure. The main issue is the degeneracy lifting (the fine-structure splitting, FSS) of an optically allowed neutral exciton state which participates in a polarization-entanglement realisation scheme. The FSS complicates polarization-entanglement detection unless a particular FSS manipulation technique is utilized to reduce it to vanishing values, or a careful selection of intrinsically good candidates from the vast number of QDs is carried out, preventing the possibility of constructing vast arrays of emitters on the same sample. In this work, site-controlled InGaAs QDs grown on (111)B oriented GaAs substrates prepatterned with 7.5 μm pitch tetrahedrons were studied in order to overcome QD asymmetry related problems. By exploiting an intrinsically high rotational symmetry, pyramidal QDs were shown as polarization-entangled photon sources emitting photons with the fidelity of the expected maximally entangled state as high as 0.721. It is the first site-controlled QD system of entangled photon emitters. Moreover, the density of such emitters was found to be as high as 15% in some areas: the density much higher than in any other QD system. The associated physical phenomena (e.g., carrier dynamic, QD energetic structure) were studied, as well, by different techniques: photon correlation spectroscopy, polarization-resolved microphotoluminescence and magneto-photoluminescence.

The emerging strategic partnership between the European Union and the African Union

Many among the emerging generation of political elites in Africa see the role the European Union (EU) plays in the maintenance of an unprecedented period of peace in Western Europe as an inspirational example of the manner in which the African Union (AU) can contribute to peace and stability in Africa. This doctoral thesis examines security cooperation between the EU and the AU, with a particular focus on the nature and substance of that cooperation. It suggests that despite the establishment of various EU–AU institutions and ties with a role in security policy and cooperation, such security cooperation is limited in substance. This study argues that EU–AU security cooperation is especially constrained by the emergence of alternative partners, most notably China, and by failures of implementation and follow-through. Two case studies, the first dealing with EU–AU cooperation in peacekeeping, and the second addressing the silent water crisis along with the link between water and security, have been analysed in detail to determine the effectiveness and sustainability of the EU–AU partnership. A number of important lessons for regionalism, interregionalism and multilateralism are drawn from the bond between the EU and the AU. This doctoral thesis will prove that, despite an emphasis on the problematic term ‘strategic’ by both EU and AU policymakers, EU–AU cooperation is limited and somewhat lacking in strategic direction. The cooperation between the EU and the AU focuses mainly on EU financial support for AU peacekeeping and specific projects in Africa (e.g. in the water sector), as well as on a limited political dialogue. Nonetheless, the EU–AU link represents the most comprehensive partnership the AU has with any non-African actor. This study will furthermore demonstrate that the United Nations (UN) is an indispensable third-party to their relationship and it is therefore more appropriate to speak of the AU–EU–UN nexus. This doctoral thesis concludes that the AU–EU–UN nexus is an important example of interregionalism in a global context and that such interregionalism is an important emerging part of global governance.