Investigating routes toward atomic layer deposition of silicon carbide: Ab initio screening of potential silicon and carbon precursors

Silicon carbide (SiC) is a promising material for electronics due to its hardness, and ability to carry high currents and high operating temperature. SiC films are currently deposited using chemical vapor deposition (CVD) at high temperatures 1500–1600 °C. However, there is a need to deposit SiC-based films on the surface of high aspect ratio features at low temperatures. One of the most precise thin film deposition techniques on high-aspect-ratio surfaces that operates at low temperatures is atomic layer deposition (ALD). However, there are currently no known methods for ALD of SiC. Herein, the authors present a first-principles thermodynamic analysis so as to screen different precursor combinations for SiC thin films. The authors do this by calculating the Gibbs energy ΔGΔG of the reaction using density functional theory and including the effects of pressure and temperature. This theoretical model was validated for existing chemical reactions in CVD of SiC at 1000 °C. The precursors disilane (Si2H6), silane (SiH4), or monochlorosilane (SiH3Cl) with ethyne (C2H2), carbontetrachloride (CCl4), or trichloromethane (CHCl3) were predicted to be the most promising for ALD of SiC at 400 °C.

Atomic layer deposition of copper for CMOS interconnects

This work concerns the atomic layer deposition (ALD) of copper. ALD is a technique that allows conformal coating of difficult topographies such as narrow trenches and holes or even shadowed regions. However, the deposition of pure metals has so far been less successful than the deposition of oxides except for a few exceptions. Challenges include difficulties associated with the reduction of the metal centre of the precursor at reasonable temperatures and the tendency of metals to agglomerate during the growth process. Cu is a metal of special technical interest as it is widely used for interconnects on CMOS devices. These interconnects are usually fabricated by electroplating, which requires the deposition of thin Cu seed layers onto the trenches and vias. Here, ALD is regarded as potential candidate for replacing the current PVD technique, which is expected to reach its limitations as the critical dimensions continue to shrink. This work is separated into two parts. In the first part, a laboratory-scale ALD reactor was constructed and used for the thermal ALD of Cu. In the second part, the potentials of the application of Cu ALD on industry scale fabrication were examined in a joint project with Applied Materials and Intel. Within this project precursors developed by industrial partners were evaluated on a 300 mm Applied Materials metal-ALD chamber modified with a direct RF-plasma source. A feature that makes ALD a popular technique among researchers is the possibility to produce high- level thin film coatings for micro-electronics and nano-technology with relatively simple laboratory- scale reactors. The advanced materials and surfaces group (AMSG) at Tyndall National Institute operates a range of home-built ALD reactors. In order to carry out Cu ALD experiments, modifications to the normal reactor design had to be made. For example a carrier gas mechanism was necessary to facilitate the transport of the low-volatile Cu precursors. Precursors evaluated included the readily available Cu(II)-diketonates Cu-bis(acetylacetonate), Cu-bis(2,2,6,6-tetramethyl-hepta-3,5-dionate) and Cu-bis(1,1,1,5,5,5-hexafluoacetylacetonate) as well as the Cu-ketoiminate Cu-bis(4N-ethylamino- pent-3-en-2-onate), which is also known under the trade name AbaCus (Air Liquide), and the Cu(I)- silylamide 1,3-diisopropyl-imidazolin-2-ylidene Cu(I) hexamethyldisilazide ([NHC]Cu(hmds)), which was developed at Carleton University Ottawa. Forming gas (10 % H2 in Ar) was used as reducing agent except in early experiments where formalin was used. With all precursors an extreme surface selectivity of the deposition process was observed and significant growth was only achieved on platinum-group metals. Improvements in the Cu deposition process were obtained with [NHC]Cu(hmds) compared with the Cu(II) complexes. A possible reason is the reduced oxidation state of the metal centre. Continuous Cu films were obtained on Pd and indications for saturated growth with a rate of about 0.4 Å/cycle were found for deposition at 220 °C. Deposits obtained on Ru consisted of separated islands. Although no continuous films could be obtained in this work the relatively high density of Cu islands obtained was a clear improvement as compared to the deposits grown with Cu(II) complexes. When ultra-thin Pd films were used as substrates, island growth was also observed. A likely reason for this extreme difference to the Cu films obtained on thicker Pd films is the lack of stress compensation within the thin films. The most likely source of stress compensation in the thicker Pd films is the formation of a graded interlayer between Pd and Cu by inter-diffusion. To obtain continuous Cu films on more materials, reduction of the growth temperature was required. This was achieved in the plasma assisted ALD experiments discussed in the second part of this work. The precursors evaluated included the AbaCus compound and CTA-1, an aliphatic Cu-bis(aminoalkoxide), which was supplied by Adeka Corp.. Depositions could be carried out at very low temperatures (60 °C Abacus, 30 °C CTA-1). Metallic Cu could be obtained on all substrate materials investigated, but the shape of the deposits varied significantly between the substrate materials. On most materials (Si, TaN, Al2O3, CDO) Cu grew in isolated nearly spherical islands even at temperatures as low as 30 °C. It was observed that the reason for the island formation is the coalescence of the initial islands to larger, spherical islands instead of forming a continuous film. On the other hand, the formation of nearly two-dimensional islands was observed on Ru. These islands grew together forming a conductive film after a reasonably small number of cycles. The resulting Cu films were of excellent crystal quality and had good electrical properties; e.g. a resistivity of 2.39 µΩ cm was measured for a 47 nm thick film. Moreover, conformal coating of narrow trenches (1 µm deep 100/1 aspect ratio) was demonstrated showing the feasibility of the ALD process.

Atomic layer deposition of interface control layers for the fabrication of III/V MOS devices

The continued advancement of metal oxide semiconductor field effect transistor (MOSFET) technology has shifted the focus from Si/SiO2 transistors towards high-κ/III-V transistors for high performance, faster devices. This has been necessary due to the limitations associated with the scaling of the SiO2 thickness below ~1 nm and the associated increased leakage current due to direct electron tunnelling through the gate oxide. The use of these materials exhibiting lower effective charge carrier mass in conjunction with the use of a high-κ gate oxide allows for the continuation of device scaling and increases in the associated MOSFET device performance. The high-κ/III-V interface is a critical challenge to the integration of high-κ dielectrics on III-V channels. The interfacial chemistry of the high-κ/III-V system is more complex than Si, due to the nature of the multitude of potential native oxide chemistries at the surface with the resultant interfacial layer showing poor electrical insulating properties when high-κ dielectrics are deposited directly on these oxides. It is necessary to ensure that a good quality interface is formed in order to reduce leakage and interface state defect density to maximise channel mobility and reduce variability and power dissipation. In this work, the ALD growth of aluminium oxide (Al2O3) and hafnium oxide (HfO2) after various surface pre-treatments was carried out, with the aim of improving the high-κ/III-V interface by reducing the Dit – the density of interface defects caused by imperfections such as dangling bonds, dimers and other unsatisfied bonds at the interfaces of materials. A brief investigation was performed into the structural and electrical properties of Al2O3 films deposited on In0.53Ga0.47As at 200 and 300oC via a novel amidinate precursor. Samples were determined to experience a severe nucleation delay when deposited directly on native oxides, leading to diminished functionality as a gate insulator due to largely reduced growth per cycle. Aluminium oxide MOS capacitors were prepared by ALD and the electrical characteristics of GaAs, In0.53Ga0.47As and InP capacitors which had been exposed to pre-pulse treatments from triethyl gallium and trimethyl indium were examined, to determine if self-cleaning reactions similar to those of trimethyl aluminium occur for other alkyl precursors. An improved C-V characteristic was observed for GaAs devices indicating an improved interface possibly indicating an improvement of the surface upon pre-pulsing with TEG, conversely degraded electrical characteristics observed for In0.53Ga0.47As and InP MOS devices after pre-treatment with triethyl gallium and trimethyl indium respectively. The electrical characteristics of Al2O3/In0.53Ga0.47As MOS capacitors after in-situ H2/Ar plasma treatment or in-situ ammonium sulphide passivation were investigated and estimates of interface Dit calculated. The use of plasma reduced the amount of interface defects as evidenced in the improved C-V characteristics. Samples treated with ammonium sulphide in the ALD chamber were found to display no significant improvement of the high-κ/III-V interface. HfO2 MOS capacitors were fabricated using two different precursors comparing the industry standard hafnium chloride process with deposition from amide precursors incorporating a ~1nm interface control layer of aluminium oxide and the structural and electrical properties investigated. Capacitors furnished from the chloride process exhibited lower hysteresis and improved C-V characteristics as compared to that of hafnium dioxide grown from an amide precursor, an indication that no etching of the film takes place using the chloride precursor in conjunction with a 1nm interlayer. Optimisation of the amide process was carried out and scaled samples electrically characterised in order to determine if reduced bilayer structures display improved electrical characteristics. Samples were determined to exhibit good electrical characteristics with a low midgap Dit indicative of an unpinned Fermi level

Atomic nanolithography patterning of submicron features: writing an organic self-assembled monolayer with cold bright Cs atom beams

Cs atom beams, transversely collimated and cooled, passing through material masks in the form of arrays of reactive-ion-etched hollow Si pyramidal tips and optical masks formed by intense standing light waves, write submicron features on self-assembled monolayers (SAMs). Features with widths as narrow as 43 ± 6 nm and spatial resolution limited only by the grain boundaries of the substrate have been realized in SAMs of alkanethiols. The material masks write two-dimensional arrays of submicron holes; the optical masks result in parallel lines spaced by half the optical wavelength. Both types of feature are written to the substrate by exposure of the masked SAM to the Cs flux and a subsequent wet chemical etch. For the arrays of pyramidal tips, acting as passive shadow masks, the resolution and size of the resultant feature depends on the distance of the mask array from the SAM, an effect caused by the residual divergence of the Cs atom beam. The standing wave optical mask acts as an array of microlenses focusing the atom flux onto the substrate. Atom 'pencils' writing on SAMs have the potential to create arbitrary submicron figures in massively parallel arrays. The smallest features and highest resolutions were realized with SAMs grown on smooth, sputtered gold substrates.