High-efficiency photovoltaics through mechanically stacked integration of solar cells based on the InP lattice constant

Solar Energy is a clean and abundant energy source that can help reduce reliance on fossil fuels around which questions still persist about their contribution to climate and long-term availability. Monolithic triple-junction solar cells are currently the state of the art photovoltaic devices with champion cell efficiencies exceeding 40%, but their ultimate efficiency is restricted by the current-matching constraint of series-connected cells. The objective of this thesis was to investigate the use of solar cells with lattice constants equal to InP in order to reduce the constraint of current matching in multi-junction solar cells. This was addressed by two approaches: Firstly, the formation of mechanically stacked solar cells (MSSC) was investigated through the addition of separate connections to individual cells that make up a multi-junction device. An electrical and optical modelling approach identified separately connected InGaAs bottom cells stacked under dual-junction GaAs based top cells as a route to high efficiency. An InGaAs solar cell was fabricated on an InP substrate with a measured 1-Sun conversion efficiency of 9.3%. A comparative study of adhesives found benzocyclobutene to be the most suitable for bonding component cells in a mechanically stacked configuration owing to its higher thermal conductivity and refractive index when compared to other candidate adhesives. A flip-chip process was developed to bond single-junction GaAs and InGaAs cells with a measured 4-terminal MSSC efficiency of 25.2% under 1-Sun conditions. Additionally, a novel InAlAs solar cell was identified, which can be used to provide an alternative to the well established GaAs solar cell. As wide bandgap InAlAs solar cells have not been extensively investigated for use in photovoltaics, single-junction cells were fabricated and their properties relevant to PV operation analysed. Minority carrier diffusion lengths in the micrometre range were extracted, confirming InAlAs as a suitable material for use in III-V solar cells, and a 1-Sun conversion efficiency of 6.6% measured for cells with 800 nm thick absorber layers. Given the cost and small diameter of commercially available InP wafers, InGaAs and InAlAs solar cells were fabricated on alternative substrates, namely GaAs. As a first demonstration the lattice constant of a GaAs substrate was graded to InP using an InxGa1-xAs metamorphic buffer layer onto which cells were grown. This was the first demonstration of an InAlAs solar cell on an alternative substrate and an initial step towards fabricating these cells on Si. The results presented offer a route to developing multi-junction solar cell devices based on the InP lattice parameter, thus extending the range of available bandgaps for high efficiency cells.

Atomic layer deposition of copper for CMOS interconnects

This work concerns the atomic layer deposition (ALD) of copper. ALD is a technique that allows conformal coating of difficult topographies such as narrow trenches and holes or even shadowed regions. However, the deposition of pure metals has so far been less successful than the deposition of oxides except for a few exceptions. Challenges include difficulties associated with the reduction of the metal centre of the precursor at reasonable temperatures and the tendency of metals to agglomerate during the growth process. Cu is a metal of special technical interest as it is widely used for interconnects on CMOS devices. These interconnects are usually fabricated by electroplating, which requires the deposition of thin Cu seed layers onto the trenches and vias. Here, ALD is regarded as potential candidate for replacing the current PVD technique, which is expected to reach its limitations as the critical dimensions continue to shrink. This work is separated into two parts. In the first part, a laboratory-scale ALD reactor was constructed and used for the thermal ALD of Cu. In the second part, the potentials of the application of Cu ALD on industry scale fabrication were examined in a joint project with Applied Materials and Intel. Within this project precursors developed by industrial partners were evaluated on a 300 mm Applied Materials metal-ALD chamber modified with a direct RF-plasma source. A feature that makes ALD a popular technique among researchers is the possibility to produce high- level thin film coatings for micro-electronics and nano-technology with relatively simple laboratory- scale reactors. The advanced materials and surfaces group (AMSG) at Tyndall National Institute operates a range of home-built ALD reactors. In order to carry out Cu ALD experiments, modifications to the normal reactor design had to be made. For example a carrier gas mechanism was necessary to facilitate the transport of the low-volatile Cu precursors. Precursors evaluated included the readily available Cu(II)-diketonates Cu-bis(acetylacetonate), Cu-bis(2,2,6,6-tetramethyl-hepta-3,5-dionate) and Cu-bis(1,1,1,5,5,5-hexafluoacetylacetonate) as well as the Cu-ketoiminate Cu-bis(4N-ethylamino- pent-3-en-2-onate), which is also known under the trade name AbaCus (Air Liquide), and the Cu(I)- silylamide 1,3-diisopropyl-imidazolin-2-ylidene Cu(I) hexamethyldisilazide ([NHC]Cu(hmds)), which was developed at Carleton University Ottawa. Forming gas (10 % H2 in Ar) was used as reducing agent except in early experiments where formalin was used. With all precursors an extreme surface selectivity of the deposition process was observed and significant growth was only achieved on platinum-group metals. Improvements in the Cu deposition process were obtained with [NHC]Cu(hmds) compared with the Cu(II) complexes. A possible reason is the reduced oxidation state of the metal centre. Continuous Cu films were obtained on Pd and indications for saturated growth with a rate of about 0.4 Å/cycle were found for deposition at 220 °C. Deposits obtained on Ru consisted of separated islands. Although no continuous films could be obtained in this work the relatively high density of Cu islands obtained was a clear improvement as compared to the deposits grown with Cu(II) complexes. When ultra-thin Pd films were used as substrates, island growth was also observed. A likely reason for this extreme difference to the Cu films obtained on thicker Pd films is the lack of stress compensation within the thin films. The most likely source of stress compensation in the thicker Pd films is the formation of a graded interlayer between Pd and Cu by inter-diffusion. To obtain continuous Cu films on more materials, reduction of the growth temperature was required. This was achieved in the plasma assisted ALD experiments discussed in the second part of this work. The precursors evaluated included the AbaCus compound and CTA-1, an aliphatic Cu-bis(aminoalkoxide), which was supplied by Adeka Corp.. Depositions could be carried out at very low temperatures (60 °C Abacus, 30 °C CTA-1). Metallic Cu could be obtained on all substrate materials investigated, but the shape of the deposits varied significantly between the substrate materials. On most materials (Si, TaN, Al2O3, CDO) Cu grew in isolated nearly spherical islands even at temperatures as low as 30 °C. It was observed that the reason for the island formation is the coalescence of the initial islands to larger, spherical islands instead of forming a continuous film. On the other hand, the formation of nearly two-dimensional islands was observed on Ru. These islands grew together forming a conductive film after a reasonably small number of cycles. The resulting Cu films were of excellent crystal quality and had good electrical properties; e.g. a resistivity of 2.39 µΩ cm was measured for a 47 nm thick film. Moreover, conformal coating of narrow trenches (1 µm deep 100/1 aspect ratio) was demonstrated showing the feasibility of the ALD process.

Atomic layer deposition of interface control layers for the fabrication of III/V MOS devices

The continued advancement of metal oxide semiconductor field effect transistor (MOSFET) technology has shifted the focus from Si/SiO2 transistors towards high-κ/III-V transistors for high performance, faster devices. This has been necessary due to the limitations associated with the scaling of the SiO2 thickness below ~1 nm and the associated increased leakage current due to direct electron tunnelling through the gate oxide. The use of these materials exhibiting lower effective charge carrier mass in conjunction with the use of a high-κ gate oxide allows for the continuation of device scaling and increases in the associated MOSFET device performance. The high-κ/III-V interface is a critical challenge to the integration of high-κ dielectrics on III-V channels. The interfacial chemistry of the high-κ/III-V system is more complex than Si, due to the nature of the multitude of potential native oxide chemistries at the surface with the resultant interfacial layer showing poor electrical insulating properties when high-κ dielectrics are deposited directly on these oxides. It is necessary to ensure that a good quality interface is formed in order to reduce leakage and interface state defect density to maximise channel mobility and reduce variability and power dissipation. In this work, the ALD growth of aluminium oxide (Al2O3) and hafnium oxide (HfO2) after various surface pre-treatments was carried out, with the aim of improving the high-κ/III-V interface by reducing the Dit – the density of interface defects caused by imperfections such as dangling bonds, dimers and other unsatisfied bonds at the interfaces of materials. A brief investigation was performed into the structural and electrical properties of Al2O3 films deposited on In0.53Ga0.47As at 200 and 300oC via a novel amidinate precursor. Samples were determined to experience a severe nucleation delay when deposited directly on native oxides, leading to diminished functionality as a gate insulator due to largely reduced growth per cycle. Aluminium oxide MOS capacitors were prepared by ALD and the electrical characteristics of GaAs, In0.53Ga0.47As and InP capacitors which had been exposed to pre-pulse treatments from triethyl gallium and trimethyl indium were examined, to determine if self-cleaning reactions similar to those of trimethyl aluminium occur for other alkyl precursors. An improved C-V characteristic was observed for GaAs devices indicating an improved interface possibly indicating an improvement of the surface upon pre-pulsing with TEG, conversely degraded electrical characteristics observed for In0.53Ga0.47As and InP MOS devices after pre-treatment with triethyl gallium and trimethyl indium respectively. The electrical characteristics of Al2O3/In0.53Ga0.47As MOS capacitors after in-situ H2/Ar plasma treatment or in-situ ammonium sulphide passivation were investigated and estimates of interface Dit calculated. The use of plasma reduced the amount of interface defects as evidenced in the improved C-V characteristics. Samples treated with ammonium sulphide in the ALD chamber were found to display no significant improvement of the high-κ/III-V interface. HfO2 MOS capacitors were fabricated using two different precursors comparing the industry standard hafnium chloride process with deposition from amide precursors incorporating a ~1nm interface control layer of aluminium oxide and the structural and electrical properties investigated. Capacitors furnished from the chloride process exhibited lower hysteresis and improved C-V characteristics as compared to that of hafnium dioxide grown from an amide precursor, an indication that no etching of the film takes place using the chloride precursor in conjunction with a 1nm interlayer. Optimisation of the amide process was carried out and scaled samples electrically characterised in order to determine if reduced bilayer structures display improved electrical characteristics. Samples were determined to exhibit good electrical characteristics with a low midgap Dit indicative of an unpinned Fermi level

Heterogeneously grown tunable group-IV laser on silicon

Tunable tensile-strained germanium (epsilon-Ge) thin films on GaAs and heterogeneously integrated on silicon (Si) have been demonstrated using graded III-V buffer architectures grown by molecular beam epitaxy (MBE). epsilon-Ge epilayers with tunable strain from 0% to 1.95% on GaAs and 0% to 1.11% on Si were realized utilizing MBE. The detailed structural, morphological, band alignment and optical properties of these highly tensile-strained Ge materials were characterized to establish a pathway for wavelength-tunable laser emission from 1.55 μm to 2.1 μm. High-resolution X-ray analysis confirmed pseudomorphic epsilon-Ge epitaxy in which the amount of strain varied linearly as a function of indium alloy composition in the InxGa1-xAs buffer. Cross-sectional transmission electron microscopic analysis demonstrated a sharp heterointerface between the epsilon-Ge and the InxGa1-xAs layer and confirmed the strain state of the epsilon-Ge epilayer. Lowtemperature micro-photoluminescence measurements confirmed both direct and indirect bandgap radiative recombination between the Γ and L valleys of Ge to the light-hole valence band, with L-lh bandgaps of 0.68 eV and 0.65 eV demonstrated for the 0.82% and 1.11% epsilon-Ge on Si, respectively. The highly epsilon-Ge exhibited a direct bandgap, and wavelength-tunable emission was observed for all samples on both GaAs and Si. Successful heterogeneous integration of tunable epsilon-Ge quantum wells on Si paves the way for the implementation of monolithic heterogeneous devices on Si.