Organic functionalisation, doping and characterisation of semiconductor surfaces for future CMOS device applications

Organic Functionalisation, Doping and Characterisation of Semiconductor Surfaces for Future CMOS Device Applications Semiconductor materials have long been the driving force for the advancement of technology since their inception in the mid-20th century. Traditionally, micro-electronic devices based upon these materials have scaled down in size and doubled in transistor density in accordance with the well-known Moore’s law, enabling consumer products with outstanding computational power at lower costs and with smaller footprints. According to the International Technology Roadmap for Semiconductors (ITRS), the scaling of metal-oxide-semiconductor field-effect transistors (MOSFETs) is proceeding at a rapid pace and will reach sub-10 nm dimensions in the coming years. This scaling presents many challenges, not only in terms of metrology but also in terms of the material preparation especially with respect to doping, leading to the moniker “More-than-Moore”. Current transistor technologies are based on the use of semiconductor junctions formed by the introduction of dopant atoms into the material using various methodologies and at device sizes below 10 nm, high concentration gradients become a necessity. Doping, the controlled and purposeful addition of impurities to a semiconductor, is one of the most important steps in the material preparation with uniform and confined doping to form ultra-shallow junctions at source and drain extension regions being one of the key enablers for the continued scaling of devices. Monolayer doping has shown promise to satisfy the need to conformally dope at such small feature sizes. Monolayer doping (MLD) has been shown to satisfy the requirements for extended defect-free, conformal and controllable doping on many materials ranging from the traditional silicon and germanium devices to emerging replacement materials such as III-V compounds This thesis aims to investigate the potential of monolayer doping to complement or replace conventional doping technologies currently in use in CMOS fabrication facilities across the world.

Chemical approaches for doping nanodevice architectures

Advanced doping technologies are key for the continued scaling of semiconductor devices and the maintenance of device performance beyond the 14 nm technology node. Due to limitations of conventional ion-beam implantation with thin body and 3D device geometries, techniques which allow precise control over dopant diffusion and concentration, in addition to excellent conformality on 3D device surfaces, are required. Spin-on doping has shown promise as a conventional technique for doping new materials, particularly through application with other dopant methods, but may not be suitable for conformal doping of nanostructures. Additionally, residues remain after most spin-on-doping processes which are often difficult to remove. In-situ doping of nanostructures is especially common for bottom-up grown nanostructures but problems associated with concentration gradients and morphology changes are commonly experienced. Monolayer doping (MLD) has been shown to satisfy the requirements for extended defect-free, conformal and controllable doping on many materials ranging from traditional silicon and germanium devices to emerging replacement materials such as III-V compounds but challenges still remain, especially with regard to metrology and surface chemistry at such small feature sizes. This article summarises and critically assesses developments over the last number of years regarding the application of gas and solution phase techniques to dope silicon-, germanium- and III-V-based materials and nanostructures to obtain shallow diffusion depths coupled with high carrier concentrations and abrupt junctions.

Use of semiconductor optical amplifiers in signal processing applications

We describe a 42.6 Gbit/s all-optical pattern recognition system which uses semiconductor optical amplifiers (SOAs). A circuit with three SOA-based logic gates is used to identify the presence of specific port numbers in an optical packet header.

Semiconductor nanowire fabrication via bottom-up & top-down paradigms

Semiconductor nanowires are pseudo 1-D structures where the magnitude of the semiconducting material is confined to a length of less than 100 nm in two dimensions. Semiconductor nanowires have a vast range of potential applications, including electronic (logic devices, diodes), photonic (laser, photodetector), biological (sensors, drug delivery), energy (batteries, solar cells, thermoelectric generators), and magnetic (spintronic, memory) devices. Semiconductor nanowires can be fabricated by a range of methods which can be categorised into one of two paradigms, bottom-up or top-down. Bottom-up processes can be defined as those where structures are assembled from their sub-components in an additive fashion. Top-down fabrication strategies use sculpting or etching to carve structures from a larger piece of material in a subtractive fashion. This seminar will detail a number of novel routes to fabricate semiconductor nanowires by both bottom-up and top-down paradigms. Firstly, a novel bottom-up route to fabricate Ge nanowires with controlled diameter distributions in the sub-20 nm regime will be described. This route details nanowire synthesis and diameter control in the absence of a foreign seed metal catalyst. Additionally a top-down route to nanowire array fabrication will be detailed outlining the importance of surface chemistry in high-resolution electron beam lithography (EBL) using hydrogen silsesquioxane (HSQ) on Ge and Bi2Se3 surfaces. Finally, a process will be described for the directed self-assembly of a diblock copolymer (PS-b-PDMS) using an EBL defined template. This section will also detail a route toward selective template sidewall wetting of either block in the PS-b-PDMS system, through tailored functionalisation of the template and substrate surfaces.

Synthesis & characterisation of group IV semiconducting nanowires

Semiconductor nanowires, particularly group 14 semiconductor nanowires, have been the subject of intensive research in the recent past. They have been demonstrated to provide an effective, versatile route towards the continued miniaturisation and improvement of microelectronics. This thesis aims to highlight some novel ways of fabricating and controlling various aspects of the growth of Si and Ge nanowires. Chapter 1 highlights the primary technique used for the growth of nanowires in this study, namely, supercritical fluid (SCF) growth reactions. The advantages (and disadvantages) of this technique for the growth of Si and Ge nanowires are highlighted, citing numerous examples from the past ten years. The many variables involved in this technique are discussed along with the resultant characteristics of nanowires produced (diameter, doping, orientation etc.). Chapter 2 outlines the experimental methodologies used in this thesis. The analytical techniques used for the structural characterisation of nanowires produced are also described as well as the techniques used for the chemical analysis of various surface terminations. Chapter 3 describes the controlled self-seeded growth of highly crystalline Ge nanowires, in the absence of conventional metal seed catalysts, using a variety of oligosilylgermane precursors and mixtures of germane and silane compounds. A model is presented which describes the main stages of self-seeded Ge nanowire growth (nucleation, coalescence and Ostwald ripening) from the oligosilylgermane precursors and in conjunction with TEM analysis, a mechanism of growth is proposed. Chapter 4 introduces the metal assisted etching (MAE) of Si substrates to produce Si nanowires. A single step metal-assisted etch (MAE) process, utilising metal ion-containing HF solutions in the absence of an external oxidant, was developed to generate heterostructured Si nanowires with controllable porous (isotropically etched) and non-porous (anisotropically etched) segments. In Chapter 5 the bottom-up growth of Ge nanowires, similar to that described in Chapter 3, and the top down etching of Si, described in Chapter 4, are combined. The introduction of a MAE processing step in order to “sink” the Ag seeds into the growth substrate, prior to nanowire growth, is shown to dramatically decrease the mean nanowire diameters and to narrow the diameter distributions. Finally, in Chapter 6, the biotin – streptavidin interaction was explored for the purposes of developing a novel Si junctionless nanowire transistor (JNT) sensor.

Properties and applications of injection locking in 1.55 μm quantum-dash mode-locked semiconductor lasers

Mode-locked semiconductor lasers are compact pulsed sources with ultra-narrow pulse widths and high repetition-rates. In order to use these sources in real applications, their performance needs to be optimised in several aspects, usually by external control. We experimentally investigate the behaviour of recently-developed quantum-dash mode-locked lasers (QDMLLs) emitting at 1.55 μm under external optical injection. Single-section and two-section lasers with different repetition frequencies and active-region structures are studied. Particularly, we are interested in a regime which the laser remains mode-locked and the individual modes are simultaneously phase-locked to the external laser. Injection-locked self-mode-locked lasers demonstrate tunable microwave generation at first or second harmonic of the free-running repetition frequency with sub-MHz RF linewidth. For two-section mode-locked lasers, using dual-mode optical injection (injection of two coherent CW lines), narrowing the RF linewidth close to that of the electrical source, narrowing the optical linewidths and reduction in the time-bandwidth product is achieved. Under optimised bias conditions of the slave laser, a repetition frequency tuning ratio >2% is achieved, a record for a monolithic semiconductor mode-locked laser. In addition, we demonstrate a novel all-optical stabilisation technique for mode-locked semiconductor lasers by combination of CW optical injection and optical feedback to simultaneously improve the time-bandwidth product and timing-jitter of the laser. This scheme does not need an RF source and no optical to electrical conversion is required and thus is ideal for photonic integration. Finally, an application of injection-locked mode-locked lasers is introduced in a multichannel phase-sensitive amplifier (PSA). We show that with dual-mode injection-locking, simultaneous phase-synchronisation of two channels to local pump sources is realised through one injection-locking stage. An experimental proof of concept is demonstrated for two 10 Gbps phase-encoded (DPSK) channels showing more than 7 dB phase-sensitive gain and less than 1 dB penalty of the receiver sensitivity.

Fabrication and characterisation of semiconductor nanowires and metal interconnects

One-dimensional semiconductor nanowires are considered to be promising materials for future nanoelectronic applications. However, before these nanowires can be integrated into such applications, a thorough understanding of their growth behaviour is necessary. In particular, methods that allow the control over nanowire growth are deemed especially important as it is these methods that will enable the control of nanowire dimensions such as length and diameter (high aspect ratios). The production of nanowires with high-aspect ratios is vital in order to take advantage of the unique properties experienced at the nanoscale, thus allowing us to maximise their use in devices. Additionally, the development of low-resistivity interconnects is desirable in order to connect such nanowires in multi-nanowire components. Consequently, this thesis aims to discuss the synthesis and characterisation of germanium (Ge) nanowires and platinum (Pt) interconnects. Particular emphasis is placed on manipulating the nanowire growth kinetics to produce high aspect ratio structures. The discussion of Pt interconnects focuses on the development of low-resistivity devices and the electrical and structural analysis of those devices. Chapter 1 reviews the most critical aspects of Ge nanowire growth which must be understood before they can be integrated into future nanodevices. These features include the synthetic methods employed to grow Ge nanowires, the kinetic and thermodynamic aspects of their growth and nanowire morphology control. Chapter 2 outlines the experimental methods used to synthesise and characterise Ge nanowires as well as the methods used to fabricate and analyse Pt interconnects. Chapter 3 discusses the control of Ge nanowire growth kinetics via the manipulation of the supersaturation of Ge in the Au/Ge binary alloy system. This is accomplished through the use of bi-layer films, which pre-form Au/Ge alloy catalysts before the introduction of the Ge precursor. The growth from these catalysts is then compared with Ge nanowire growth from standard elemental Au seeds. Nanowires grown from pre-formed Au/Ge alloy seeds demonstrate longer lengths and higher growth rates than those grown from standard Au seeds. In-situ TEM heating on the Au/Ge bi-layer films is used to support the growth characteristics observed. Chapter 4 extends the work of chapter 3 by utilising Au/Ag/Ge tri-layer films to enhance the growth rates and lengths of Ge nanowires. These nanowires are grown from Au/Ag/Ge ternary alloy catalysts. Once again, the supersaturation is influenced, only this time it is through the simultaneous manipulation of both the solute concentration and equilibrium concentration of Ge in the Au/Ag/Ge ternary alloy system. The introduction of Ag to the Au/Ge binary alloy lowers the equilibrium concentration, thus increasing the nanowire growth rate and length. Nanowires with uniform diameters were obtained via synthesis from AuxAg1-x alloy nanoparticles. Manifestation of the Gibbs-Thomson effect, resulting from the dependence of the mean nanowire length as a function of diameter, was observed for all of the nanowires grown from the AuxAg1-x nanoparticles. Finally, in-situ TEM heating was used to support the nanowire growth characteristics. Chapter 5 details the fabrication and characterisation of Pt interconnects deposited by electron beam induced deposition of two different precursors. The fabrication is conducted inside a dual beam FIB. The electrical and structural characteristics of interconnects deposited from a standard organometallic precursor and a novel carbon-free precursor are compared. The electrical performance of the carbon-free interconnects is shown to be superior to that of the organometallic devices and this is correlated to the structural composition of both interconnects via in-situ TEM heating and HAADF-STEM analysis. Annealing of the interconnects is carried out under two different atmospheres in order to reduce the electrical resistivity even further. Finally, chapter 6 presents some important conclusions and summarises each of the previous chapters.

Analysis and optimisation of semiconductor reflective modulators for optical networks

Reflective modulators based on the combination of an electroabsorption modulator (EAM) and semiconductor optical amplifier (SOA) are attractive devices for applications in long reach carrier distributed passive optical networks (PONs) due to the gain provided by the SOA and the high speed and low chirp modulation of the EAM. Integrated R-EAM-SOAs have experimentally shown two unexpected and unintuitive characteristics which are not observed in a single pass transmission SOA: the clamping of the output power of the device around a maximum value and low patterning distortion despite the SOA being in a regime of gain saturation. In this thesis a detailed analysis is carried out using both experimental measurements and modelling in order to understand these phenomena. For the first time it is shown that both the internal loss between SOA and R-EAM and the SOA gain play an integral role in the behaviour of gain saturated R-EAM-SOAs. Internal loss and SOA gain are also optimised for use in a carrier distributed PONs in order to access both the positive effect of output power clamping, and hence upstream dynamic range reduction, combined with low patterning operation of the SOA Reflective concepts are also gaining interest for metro transport networks and short reach, high bit rate, inter-datacentre links. Moving the optical carrier generation away from the transmitter also has potential advantages for these applications as it avoids the need for cooled photonics being placed directly on hot router line-cards. A detailed analysis is carried out in this thesis on a novel colourless reflective duobinary modulator, which would enable wavelength flexibility in a power-efficient reflective metro node.

Fabrication and characterization of doped and porous silicon nanowires as anodes for lithium ion batteries

By using Si(100) with different dopant type (n++-type (As) or p-type (B)), it is shown how metal-assisted chemically (MAC) etched silicon nanowires (Si NWs) can form with rough outer surfaces around a solid NW core for p-type NWs, and a unique, defined mesoporous structure for highly doped n-type NWs. High resolution electron microscopy techniques were used to define the characteristic roughening and mesoporous structure within the NWs and how such structures can form due to a judicious choice of carrier concentration and dopant type. Control of roughness and internal mesoporosity is demonstrated during the formation of Si NWs from highly doped n-type Si(100) during electroless etching through a systematic investigation of etching parameters (etching time, AgNO3 concentration, %HF and temperature). Raman scattering measurements of the transverse optical phonon confirm quantum size effects and phonon scattering in mesoporous wires associated with the etching condition, including quantum confinement effects for the nanocrystallites of Si comprising the internal structure of the mesoporous NWs. Laser power heating of NWs confirms phonon confinement and scattering from internal mesoporosity causing reduced thermal conductivity. The Li+ insertion and extraction characteristics at n-type and p-type Si(100) electrodes with different carrier density and doping type are investigated by cyclic voltammetry and constant current measurements. The insertion and extraction potentials are demonstrated to vary with cycling and the occurrence of an activation effect is shown in n-type electrodes where the charge capacity and voltammetric currents are found to be much higher than p-type electrodes. X-ray photo-electron spectroscopy (XPS) and Raman scattering demonstrate that highly doped n-type Si(100) retains Li as a silicide and converts to an amorphous phase as a two-step phase conversion process. The findings show the succinct dependence of Li insertion and extraction processes for uniformly doped Si(100) single crystals and how the doping type and its effect on the semiconductor-solution interface dominate Li insertion and extraction, composition, crystallinity changes and charge capacity. The effect of dopant, doping density and porosity of MAC etched Si NWs are investigated. The CV response is shown to change in area (current density) with increasing NW length and in profile shape with a changing porosity of the Si NWs. The CV response also changes with scan rate indicative of a transition from intercalation or alloying reactions, to pseudocapactive charge storage at higher scan rates and for p-type NWs. SEM and TEM show a change in structure of the NWs after Li insertion and extraction due to expansion and contraction of the Si NWs. Galvanostatic measurements show the cycling behavior and the Coulombic efficiency of the Si NWs in comparison to their bulk counterparts.

All-optical signal processing using semiconductor optical amplifiers for next generation optical networks

This thesis details an experimental and simulation investigation of some novel all-optical signal processing techniques for future optical communication networks. These all-optical techniques include modulation format conversion, phase discrimination and clock recovery. The methods detailed in this thesis use the nonlinearities associated with semiconductor optical amplifiers (SOA) to manipulate signals in the optical domain. Chapter 1 provides an introduction into the work detailed in this thesis, discusses the increased demand for capacity in today’s optical fibre networks and finally explains why all-optical signal processing may be of interest for future optical networks. Chapter 2 discusses the relevant background information required to fully understand the all-optical techniques demonstrated in this thesis. Chapter 3 details some pump-probe measurement techniques used to calculate the gain and phase recovery times of a long SOA. A remarkably fast gain recovery is observed and the wavelength dependent nature of this recovery is investigated. Chapter 4 discusses the experimental demonstration of an all-optical modulation conversion technique which can convert on-off- keyed data into either duobinary or alternative mark inversion. In Chapter 5 a novel phase sensitive frequency conversion scheme capable of extracting the two orthogonal components of a quadrature phase modulated signal into two separate frequencies is demonstrated. Chapter 6 investigates a novel all-optical clock recovery technique for phase modulated optical orthogonal frequency division multiplexing superchannels and finally Chapter 7 provides a brief conclusion.

Novel processes, test structures and characterisation for future germanium technologies

In order to widely use Ge and III-V materials instead of Si in advanced CMOS technology, the process and integration of these materials has to be well established so that their high mobility benefit is not swamped by imperfect manufacturing procedures. In this dissertation number of key bottlenecks in realization of Ge devices are investigated; We address the challenge of the formation of low resistivity contacts on n-type Ge, comparing conventional and advanced rapid thermal annealing (RTA) and laser thermal annealing (LTA) techniques respectively. LTA appears to be a feasible approach for realization of low resistivity contacts with an incredibly sharp germanide-substrate interface and contact resistivity in the order of 10 -7 Ω.cm2. Furthermore the influence of RTA and LTA on dopant activation and leakage current suppression in n+/p Ge junction were compared. Providing very high active carrier concentration > 1020 cm-3, LTA resulted in higher leakage current compared to RTA which provided lower carrier concentration ~1019 cm-3. This is an indication of a trade-off between high activation level and junction leakage current. High ION/IOFF ratio ~ 107 was obtained, which to the best of our knowledge is the best reported value for n-type Ge so far. Simulations were carried out to investigate how target sputtering, dose retention, and damage formation is generated in thin-body semiconductors by means of energetic ion impacts and how they are dependent on the target physical material properties. Solid phase epitaxy studies in wide and thin Ge fins confirmed the formation of twin boundary defects and random nucleation growth, like in Si, but here 600 °C annealing temperature was found to be effective to reduce these defects. Finally, a non-destructive doping technique was successfully implemented to dope Ge nanowires, where nanowire resistivity was reduced by 5 orders of magnitude using PH3 based in-diffusion process.

Au nanorods-semiconductor nanowire hybrid nanostructures : nanofabrication techniques and optoelectronic properties

The objective of this thesis is the exploration and characterization of novel Au nanorod-semiconductor nanowire hybrid nanostructures. I provide a comprehensive bottom-up approach in which, starting from the synthesis and theoretical investigation of the optical properties of Au nanorods, I design, nanofabricate and characterize Au nanorods-semiconductor nanowire hybrid nanodevices with novel optoelectronic capabilities compared to the non-hybrid counterpart. In this regards, I first discuss the seed-mediated protocols to synthesize Au nanorods with different sizes and the influence of nanorod geometries and non-homogeneous surrounding medium on the optical properties investigated by theoretical simulation. Novel methodologies for assembling Au nanorods on (i) a Si/SiO2 substrate with highly-ordered architecture and (ii) on semiconductor nanowires with spatial precision are developed and optimized. By exploiting these approaches, I demonstrate that Raman active modes of an individual ZnO nanowire can be detected in non-resonant conditions by exploring the longitudinal plasmonic resonance mediation of chemical-synthesized Au nanorods deposited on the nanowire surface otherwise not observable on bare ZnO nanowire. Finally, nanofabrication and detailed electrical characterization of ZnO nanowire field-effect transistor (FET) and optoelectronic properties of Au nanorods - ZnO nanowire FET tunable near-infrared photodetector are investigated. In particular we demonstrated orders of magnitude enhancement in the photocurrent intensity in the explored range of wavelengths and 40 times faster time response compared to the bare ZnO FET detector. The improved performance, attributed to the plasmonicmediated hot-electron generation and injection mechanism underlying the photoresponse is investigated both experimentally and theoretically. The miniaturized, tunable and integrated capabilities offered by metal nanorodssemicondictor nanowire device architectures presented in this thesis work could have an important impact in many application fields such as opto-electronic sensors, photodetectors and photovoltaic devices and open new avenues for designing of novel nanoscale optoelectronic devices.