Design principles for maximizing photovoltage in metal-oxide-protected water-splitting photoanodes

Metal oxide protection layers for photoanodes may enable the development of large-scale solar fuel and solar chemical synthesis, but the poor photovoltages often reported so far will severely limit their performance. Here we report a novel observation of photovoltage loss associated with a charge extraction barrier imposed by the protection layer, and, by eliminating it, achieve photovoltages as high as 630mV, the maximum reported so far for water-splitting silicon photoanodes. The loss mechanism is systematically probed in metal-insulator-semiconductor Schottky junction cells compared to buried junction p(+) n cells, revealing the need to maintain a characteristic hole density at the semiconductor/insulator interface. A leaky-capacitor model related to the dielectric properties of the protective oxide explains this loss, achieving excellent agreement with the data. From these findings, we formulate design principles for simultaneous optimization of built-in field, interface quality, and hole extraction to maximize the photovoltage of oxide-protected water-splitting anodes.

Engineering interfacial silicon dioxide for improved metal-insulator-semiconductor silicon photoanode water splitting performance

Silicon photoanodes protected by atomic layer deposited (ALD) TiO2 show promise as components of water splitting devices that may enable the large-scale production of solar fuels and chemicals. Minimizing the resistance of the oxide corrosion protection layer is essential for fabricating efficient devices with good fill factor. Recent literature reports have shown that the interfacial SiO2 layer, interposed between the protective ALD-TiO2 and the Si anode, acts as a tunnel oxide that limits hole conduction from the photoabsorbing substrate to the surface oxygen evolution catalyst. Herein, we report a significant reduction of bilayer resistance, achieved by forming stable, ultrathin (<1.3 nm) SiO2 layers, allowing fabrication of water splitting photoanodes with hole conductances near the maximum achievable with the given catalyst and Si substrate. Three methods for controlling the SiO2 interlayer thickness on the Si(100) surface for ALD-TiO2 protected anodes were employed: (1) TiO2 deposition directly on an HF-etched Si(100) surface, (2) TiO2 deposition after SiO2 atomic layer deposition on an HF-etched Si(100) surface, and (3) oxygen scavenging, post-TiO2 deposition to decompose the SiO2 layer using a Ti overlayer. Each of these methods provides a progressively superior means of reliably thinning the interfacial SiO2 layer, enabling the fabrication of efficient and stable water oxidation silicon anodes.

Atomic layer deposition of interface control layers for the fabrication of III/V MOS devices

The continued advancement of metal oxide semiconductor field effect transistor (MOSFET) technology has shifted the focus from Si/SiO2 transistors towards high-κ/III-V transistors for high performance, faster devices. This has been necessary due to the limitations associated with the scaling of the SiO2 thickness below ~1 nm and the associated increased leakage current due to direct electron tunnelling through the gate oxide. The use of these materials exhibiting lower effective charge carrier mass in conjunction with the use of a high-κ gate oxide allows for the continuation of device scaling and increases in the associated MOSFET device performance. The high-κ/III-V interface is a critical challenge to the integration of high-κ dielectrics on III-V channels. The interfacial chemistry of the high-κ/III-V system is more complex than Si, due to the nature of the multitude of potential native oxide chemistries at the surface with the resultant interfacial layer showing poor electrical insulating properties when high-κ dielectrics are deposited directly on these oxides. It is necessary to ensure that a good quality interface is formed in order to reduce leakage and interface state defect density to maximise channel mobility and reduce variability and power dissipation. In this work, the ALD growth of aluminium oxide (Al2O3) and hafnium oxide (HfO2) after various surface pre-treatments was carried out, with the aim of improving the high-κ/III-V interface by reducing the Dit – the density of interface defects caused by imperfections such as dangling bonds, dimers and other unsatisfied bonds at the interfaces of materials. A brief investigation was performed into the structural and electrical properties of Al2O3 films deposited on In0.53Ga0.47As at 200 and 300oC via a novel amidinate precursor. Samples were determined to experience a severe nucleation delay when deposited directly on native oxides, leading to diminished functionality as a gate insulator due to largely reduced growth per cycle. Aluminium oxide MOS capacitors were prepared by ALD and the electrical characteristics of GaAs, In0.53Ga0.47As and InP capacitors which had been exposed to pre-pulse treatments from triethyl gallium and trimethyl indium were examined, to determine if self-cleaning reactions similar to those of trimethyl aluminium occur for other alkyl precursors. An improved C-V characteristic was observed for GaAs devices indicating an improved interface possibly indicating an improvement of the surface upon pre-pulsing with TEG, conversely degraded electrical characteristics observed for In0.53Ga0.47As and InP MOS devices after pre-treatment with triethyl gallium and trimethyl indium respectively. The electrical characteristics of Al2O3/In0.53Ga0.47As MOS capacitors after in-situ H2/Ar plasma treatment or in-situ ammonium sulphide passivation were investigated and estimates of interface Dit calculated. The use of plasma reduced the amount of interface defects as evidenced in the improved C-V characteristics. Samples treated with ammonium sulphide in the ALD chamber were found to display no significant improvement of the high-κ/III-V interface. HfO2 MOS capacitors were fabricated using two different precursors comparing the industry standard hafnium chloride process with deposition from amide precursors incorporating a ~1nm interface control layer of aluminium oxide and the structural and electrical properties investigated. Capacitors furnished from the chloride process exhibited lower hysteresis and improved C-V characteristics as compared to that of hafnium dioxide grown from an amide precursor, an indication that no etching of the film takes place using the chloride precursor in conjunction with a 1nm interlayer. Optimisation of the amide process was carried out and scaled samples electrically characterised in order to determine if reduced bilayer structures display improved electrical characteristics. Samples were determined to exhibit good electrical characteristics with a low midgap Dit indicative of an unpinned Fermi level

First principles simulation of amorphous silicon bulk, interfaces, and nanowires for photovoltaics

Amorphous silicon has become the material of choice for many technologies, with major applications in large area electronics: displays, image sensing and thin film photovoltaic cells. This technology development has occurred because amorphous silicon is a thin film semiconductor that can be deposited on large, low cost substrates using low temperature. In this thesis, classical molecular dynamics and first principles DFT calculations have been performed to generate structural models of amorphous and hydrogenated amorphous silicon and interfaces of amorphous and crystalline silicon, with the ultimate aim of understanding the photovoltaic properties of core-shell crystalline amorphous Si nanowire structures. We have shown, unexpectedly, from the simulations, that our understanding of hydrogenated bulk a-Si needs to be revisited, with our robust finding that when fully saturated with hydrogen, bulk a-Si exhibits a constant optical energy gap, irrespective of the hydrogen concentration in the sample. Unsaturated a-Si:H, with a lower than optimum hydrogen content, shows a smaller optical gap, that increases with hydrogen content until saturation is reached. The mobility gaps obtained from an analysis of the electronic states show similar behavior. We also obtained that the optical and mobility gaps show a volcano curve as the H content is varied from 7% (undersaturation) to 18% (mild oversaturation). In the case of mild over saturation, the mid-gap states arise exclusively from an increase in the density of strained Si-Si bonds. Analysis of our structures shows the extra H atoms in this case form a bridge between neighboring silicon atoms which increases the corresponding Si-Si distance and promotes bond length disorder in the sample. That has the potential to enhance the Staebler-Wronski effect. Planar interface models of amorphous-crystalline silicon have been generated in Si (100), (110) and (111) surfaces. The interface models are characterized by structure, RDF, electronic density of states and optical absorption spectrum. We find that the least stable (100) surface will result in the formation of the thickest amorphous silicon layer, while the most stable (110) surface forms the smallest amorphous region. We calculated for the first time band offsets of a-Si:H/c-Si heterojunctions from first principles and examined the influence of different surface orientations and amorphous layer thickness on the offsets and implications for device performance. The band offsets depend on the amorphous layer thickness and increase with thickness. By controlling the amorphous layer thickness we can potentially optimise the solar cell parameters. Finally, we have successfully generated different amorphous layer thickness of the a-Si/c-Si and a-Si:H/c-Si 5 nm nanowires from heat and quench. We perform structural analysis of the a-Si-/c-Si nanowires. The RDF, Si-Si bond length distributions, and the coordination number distributions of amorphous regions of the nanowires reproduce similar behaviour compared to bulk amorphous silicon. In the final part of this thesis we examine different surface terminating chemical groups, -H, - OH and –NH2 in (001) GeNW. Our work shows that the diameter of Ge nanowires and the nature of surface terminating groups both play a significant role in both the magnitude and the nature of the nanowire band gaps, allowing tuning of the band gap by up to 1.1 eV. We also show for the first time how the nanowire diameter and surface termination shifts the absorption edge in the Ge nanowires to longer wavelengths. Thus, the combination of nanowire diameter and surface chemistry can be effectively utilised to tune the band gaps and thus light absorption properties of small diameter Ge nanowires.