5 resultados para Processor-Supervisor

em CORA - Cork Open Research Archive - University College Cork - Ireland


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Adequate hand-washing has been shown to be a critical activity in preventing the transmission of infections such as MRSA in health-care environments. Hand-washing guidelines published by various health-care related institutions recommend a technique incorporating six hand-washing poses that ensure all areas of the hands are thoroughly cleaned. In this paper, an embedded wireless vision system (VAMP) capable of accurately monitoring hand-washing quality is presented. The VAMP system hardware consists of a low resolution CMOS image sensor and FPGA processor which are integrated with a microcontroller and ZigBee standard wireless transceiver to create a wireless sensor network (WSN) based vision system that can be retargeted at a variety of health care applications. The device captures and processes images locally in real-time, determines if hand-washing procedures have been correctly undertaken and then passes the resulting high-level data over a low-bandwidth wireless link. The paper outlines the hardware and software mechanisms of the VAMP system and illustrates that it offers an easy to integrate sensor solution to adequately monitor and improve hand hygiene quality. Future work to develop a miniaturized, low cost system capable of being integrated into everyday products is also discussed.

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This research asks the question: “What are the relational dynamics in Masters (MA) supervision?” It does so by focusing upon the supervisory relationship itself. It does this through dialoguing with the voices of both MA supervisors and supervisees in the Humanities using a Cultural Historical Activity Theory (CHAT) framework. In so doing, this research argues for a re-evaluation of how MA supervision is conceptualised and proposes a new theoretical framework for conceptualising MA supervision as a relational phenomenon. The research design was derived from an Activity Theory-influenced methodology. Data collection procedures included the administration of Activity Theory Logs, individual semi-structured interviews with both supervisors and supervisees and the completion of reflective journals. Grounded Theory was used to analyse the data. The sample for the study consists of three supervisor-supervisee dyads from three disciplines in the Humanities. Data was collected over the course of one academic year, 2010-2011. This research found that both individual and shared relational dynamics play an important role in MA supervision. Individual dynamics, such as supervisors’ iterative negotiation of ambiguity/clarity and supervisees’ boundary work, revealed that both parties attempt to negotiate a separation between their professional-academic identities and personal identities. However, an inherent paradox emerged when the shared relational dynamics of MA supervision were investigated. It was found that the shared space created by the supervisory relationship did not only exist in a physical setting, but was also psychoactive in nature and held strong emotional resonances for both parties involved. This served to undermine the separation between professional-academic and personal identities. As a result, this research argues that the interaction between the individual and shared relational dynamics in MA supervision enables, for both supervisors and supervisees, a disciplined improvisation of academic identity.

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In the field of embedded systems design, coprocessors play an important role as a component to increase performance. Many embedded systems are built around a small General Purpose Processor (GPP). If the GPP cannot meet the performance requirements for a certain operation, a coprocessor can be included in the design. The GPP can then offload the computationally intensive operation to the coprocessor; thus increasing the performance of the overall system. A common application of coprocessors is the acceleration of cryptographic algorithms. The work presented in this thesis discusses coprocessor architectures for various cryptographic algorithms that are found in many cryptographic protocols. Their performance is then analysed on a Field Programmable Gate Array (FPGA) platform. Firstly, the acceleration of Elliptic Curve Cryptography (ECC) algorithms is investigated through the use of instruction set extension of a GPP. The performance of these algorithms in a full hardware implementation is then investigated, and an architecture for the acceleration the ECC based digital signature algorithm is developed. Hash functions are also an important component of a cryptographic system. The FPGA implementation of recent hash function designs from the SHA-3 competition are discussed and a fair comparison methodology for hash functions presented. Many cryptographic protocols involve the generation of random data, for keys or nonces. This requires a True Random Number Generator (TRNG) to be present in the system. Various TRNG designs are discussed and a secure implementation, including post-processing and failure detection, is introduced. Finally, a coprocessor for the acceleration of operations at the protocol level will be discussed, where, a novel aspect of the design is the secure method in which private-key data is handled

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This paper presents our efforts to bridge the gap between mobile context awareness, and mobile cloud services, using the Cloud Personal Assistant (CPA). The CPA is a part of the Context Aware Mobile Cloud Services (CAMCS) middleware, which we continue to develop. Specifically, we discuss the development and evaluation of the Context Processor component of this middleware. This component collects context data from the mobile devices of users, which is then provided to the CPA of each user, for use with mobile cloud services. We discuss the architecture and implementation of the Context Processor, followed by the evaluation. We introduce context profiles for the CPA, which influence its operation by using different context types. As part of the evaluation, we present two experimental context-aware mobile cloud services to illustrate how the CPA works with user context, and related context profiles, to complete tasks for the user.

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New compensation methods are presented that can greatly reduce the slit errors (i.e. transition location errors) and interval errors induced due to non-idealities in optical incremental encoders (square-wave). An M/T-type, constant sample-time digital tachometer (CSDT) is selected for measuring the velocity of the sensor drives. Using this data, three encoder compensation techniques (two pseudoinverse based methods and an iterative method) are presented that improve velocity measurement accuracy. The methods do not require precise knowledge of shaft velocity. During the initial learning stage of the compensation algorithm (possibly performed in-situ), slit errors/interval errors are calculated through pseudoinversebased solutions of simple approximate linear equations, which can provide fast solutions, or an iterative method that requires very little memory storage. Subsequent operation of the motion system utilizes adjusted slit positions for more accurate velocity calculation. In the theoretical analysis of the compensation of encoder errors, encoder error sources such as random electrical noise and error in estimated reference velocity are considered. Initially, the proposed learning compensation techniques are validated by implementing the algorithms in MATLAB software, showing a 95% to 99% improvement in velocity measurement. However, it is also observed that the efficiency of the algorithm decreases with the higher presence of non-repetitive random noise and/or with the errors in reference velocity calculations. The performance improvement in velocity measurement is also demonstrated experimentally using motor-drive systems, each of which includes a field-programmable gate array (FPGA) for CSDT counting/timing purposes, and a digital-signal-processor (DSP). Results from open-loop velocity measurement and closed-loop servocontrol applications, on three optical incremental square-wave encoders and two motor drives, are compiled. While implementing these algorithms experimentally on different drives (with and without a flywheel) and on encoders of different resolutions, slit error reductions of 60% to 86% are obtained (typically approximately 80%).