Average-case analysis of power consumption in embedded systems

Power efficiency is one of the most important constraints in the design of embedded systems since such systems are generally driven by batteries with limited energy budget or restricted power supply. In every embedded system, there are one or more processor cores to run the software and interact with the other hardware components of the system. The power consumption of the processor core(s) has an important impact on the total power dissipated in the system. Hence, the processor power optimization is crucial in satisfying the power consumption constraints, and developing low-power embedded systems. A key aspect of research in processor power optimization and management is “power estimation”. Having a fast and accurate method for processor power estimation at design time helps the designer to explore a large space of design possibilities, to make the optimal choices for developing a power efficient processor. Likewise, understanding the processor power dissipation behaviour of a specific software/application is the key for choosing appropriate algorithms in order to write power efficient software. Simulation-based methods for measuring the processor power achieve very high accuracy, but are available only late in the design process, and are often quite slow. Therefore, the need has arisen for faster, higher-level power prediction methods that allow the system designer to explore many alternatives for developing powerefficient hardware and software. The aim of this thesis is to present fast and high-level power models for the prediction of processor power consumption. Power predictability in this work is achieved in two ways: first, using a design method to develop power predictable circuits; second, analysing the power of the functions in the code which repeat during execution, then building the power model based on average number of repetitions. In the first case, a design method called Asynchronous Charge Sharing Logic (ACSL) is used to implement the Arithmetic Logic Unit (ALU) for the 8051 microcontroller. The ACSL circuits are power predictable due to the independency of their power consumption to the input data. Based on this property, a fast prediction method is presented to estimate the power of ALU by analysing the software program, and extracting the number of ALU-related instructions. This method achieves less than 1% error in power estimation and more than 100 times speedup in comparison to conventional simulation-based methods. In the second case, an average-case processor energy model is developed for the Insertion sort algorithm based on the number of comparisons that take place in the execution of the algorithm. The average number of comparisons is calculated using a high level methodology called MOdular Quantitative Analysis (MOQA). The parameters of the energy model are measured for the LEON3 processor core, but the model is general and can be used for any processor. The model has been validated through the power measurement experiments, and offers high accuracy and orders of magnitude speedup over the simulation-based method.

Performance improvements of mooring systems for wave energy converters

In the development of wave energy converters, the mooring system is a key component for a safe station-keeping and an important factor in the cost of the wave energy production. Generally, when designing a mooring system for a wave energy converter, two important conditions must be considered: (i) that the mooring system must be strong enough to limit the drifting motions, even in extreme waves, tidal and wind conditions and (ii) it must be compliant enough so that the impact on wave energy production can be minimised. It is frequently found that these two conditions are contradictory. The existing solutions mainly include the use of heavy chains, which create a catenary shaped mooring configuration, allowing limited flexibility within the mooring system, and hence very large forces may still be present on mooring lines and thus on anchors. This solution is normally quite expensive if the costs of the materials and installation are included. This paper presents a new solution to the mooring system for wave energy converters within the FP7 project, ‘GeoWAVE’, which is a project aiming to develop a new generation of the moorings system for minimising the loads on mooring lines and anchors, the impact on the device motions for power conversion, and the footprint if it is applicable, and meanwhile the new types of anchors are also addressed within the project. However this paper will focus on the new mooring system by presenting the wave tank test results of the Pelamis wave energy converter model and the new developed mooring system. It can be seen that the new generation of mooring system can significantly reduce the loads on mooring lines and anchors, and reduce the device excursions as a result of the new mooring system when compare to the conventional catenary mooring.