3 resultados para Library automation
em CORA - Cork Open Research Archive - University College Cork - Ireland
Resumo:
The objective of this essay is not a description of the presently unresearched, unstated and unquantified tradition of collectors, collecting and collectables in Cork; it is rather one of signposting what survives in terms of influences which coalesced into what became the bibliographical and museological resources of the Queen's College and ultimately University College, Cork (UCC).
Resumo:
This study explores the topic of leadership as perceived and practised by public library leaders. Library leaders have a wide-ranging impact on society but have been largely overlooked as the subject of serious study. Prior to this study, only one small interview-based study and five survey-based studies have been undertaken on public library leaders/leadership — all in North America. No study on the topic has been researched and published outside of North America. The current study is the most in-depth study to date, drawing on face-to-face interviews with thirty public library leaders. As this study was undertaken in three national jurisdictions — Ireland, Britain, and America — it is also the first transnational study on the topic. The study investigates library leaders’ perceptions of leadership, and critically explores if head librarians distinguish classic leadership from management practices, both conceptually and in their work lives. In addition to exploring core leadership issues, such as positive or negative traits, the study also investigates the perceptions of library leaders on matters closely connected with their careers. The study investigates the impact of public library leaders on their followers and on the broader society they serve. This study of the perceptions of senior public library leaders, across national boundaries, makes a theoretical contribution not just to leadership in librarianship, but also to the broader theory of library and information science, and in a limited way to the broad corpus of literature on organizational leadership. The study aims to develop an understanding of the perceptions of current leaders in the field of public librarianship. The results of the study show that leadership is a relatively scarce quality in public libraries in Ireland, Britain, and America. Many public library leaders focus on management and administration issues rather than leadership. The study also illustrates that varying leadership styles are practised by the interviewed librarians, and that there are no universal or common traits, even within national boundaries, for effective public library leadership. The implications of the study for both practising librarians and research literatures in librarianship and organizational leadership are also explored and a future research agenda developed.
Resumo:
With the proliferation of mobile wireless communication and embedded systems, the energy efficiency becomes a major design constraint. The dissipated energy is often referred as the product of power dissipation and the input-output delay. Most of electronic design automation techniques focus on optimising only one of these parameters either power or delay. Industry standard design flows integrate systematic methods of optimising either area or timing while for power consumption optimisation one often employs heuristics which are characteristic to a specific design. In this work we answer three questions in our quest to provide a systematic approach to joint power and delay Optimisation. The first question of our research is: How to build a design flow which incorporates academic and industry standard design flows for power optimisation? To address this question, we use a reference design flow provided by Synopsys and integrate in this flow academic tools and methodologies. The proposed design flow is used as a platform for analysing some novel algorithms and methodologies for optimisation in the context of digital circuits. The second question we answer is: Is possible to apply a systematic approach for power optimisation in the context of combinational digital circuits? The starting point is a selection of a suitable data structure which can easily incorporate information about delay, power, area and which then allows optimisation algorithms to be applied. In particular we address the implications of a systematic power optimisation methodologies and the potential degradation of other (often conflicting) parameters such as area or the delay of implementation. Finally, the third question which this thesis attempts to answer is: Is there a systematic approach for multi-objective optimisation of delay and power? A delay-driven power and power-driven delay optimisation is proposed in order to have balanced delay and power values. This implies that each power optimisation step is not only constrained by the decrease in power but also the increase in delay. Similarly, each delay optimisation step is not only governed with the decrease in delay but also the increase in power. The goal is to obtain multi-objective optimisation of digital circuits where the two conflicting objectives are power and delay. The logic synthesis and optimisation methodology is based on AND-Inverter Graphs (AIGs) which represent the functionality of the circuit. The switching activities and arrival times of circuit nodes are annotated onto an AND-Inverter Graph under the zero and a non-zero-delay model. We introduce then several reordering rules which are applied on the AIG nodes to minimise switching power or longest path delay of the circuit at the pre-technology mapping level. The academic Electronic Design Automation (EDA) tool ABC is used for the manipulation of AND-Inverter Graphs. We have implemented various combinatorial optimisation algorithms often used in Electronic Design Automation such as Simulated Annealing and Uniform Cost Search Algorithm. Simulated Annealing (SMA) is a probabilistic meta heuristic for the global optimization problem of locating a good approximation to the global optimum of a given function in a large search space. We used SMA to probabilistically decide between moving from one optimised solution to another such that the dynamic power is optimised under given delay constraints and the delay is optimised under given power constraints. A good approximation to the global optimum solution of energy constraint is obtained. Uniform Cost Search (UCS) is a tree search algorithm used for traversing or searching a weighted tree, tree structure, or graph. We have used Uniform Cost Search Algorithm to search within the AIG network, a specific AIG node order for the reordering rules application. After the reordering rules application, the AIG network is mapped to an AIG netlist using specific library cells. Our approach combines network re-structuring, AIG nodes reordering, dynamic power and longest path delay estimation and optimisation and finally technology mapping to an AIG netlist. A set of MCNC Benchmark circuits and large combinational circuits up to 100,000 gates have been used to validate our methodology. Comparisons for power and delay optimisation are made with the best synthesis scripts used in ABC. Reduction of 23% in power and 15% in delay with minimal overhead is achieved, compared to the best known ABC results. Also, our approach is also implemented on a number of processors with combinational and sequential components and significant savings are achieved.