2 resultados para JITTER
em CORA - Cork Open Research Archive - University College Cork - Ireland
Resumo:
Mode-locked semiconductor lasers are compact pulsed sources with ultra-narrow pulse widths and high repetition-rates. In order to use these sources in real applications, their performance needs to be optimised in several aspects, usually by external control. We experimentally investigate the behaviour of recently-developed quantum-dash mode-locked lasers (QDMLLs) emitting at 1.55 μm under external optical injection. Single-section and two-section lasers with different repetition frequencies and active-region structures are studied. Particularly, we are interested in a regime which the laser remains mode-locked and the individual modes are simultaneously phase-locked to the external laser. Injection-locked self-mode-locked lasers demonstrate tunable microwave generation at first or second harmonic of the free-running repetition frequency with sub-MHz RF linewidth. For two-section mode-locked lasers, using dual-mode optical injection (injection of two coherent CW lines), narrowing the RF linewidth close to that of the electrical source, narrowing the optical linewidths and reduction in the time-bandwidth product is achieved. Under optimised bias conditions of the slave laser, a repetition frequency tuning ratio >2% is achieved, a record for a monolithic semiconductor mode-locked laser. In addition, we demonstrate a novel all-optical stabilisation technique for mode-locked semiconductor lasers by combination of CW optical injection and optical feedback to simultaneously improve the time-bandwidth product and timing-jitter of the laser. This scheme does not need an RF source and no optical to electrical conversion is required and thus is ideal for photonic integration. Finally, an application of injection-locked mode-locked lasers is introduced in a multichannel phase-sensitive amplifier (PSA). We show that with dual-mode injection-locking, simultaneous phase-synchronisation of two channels to local pump sources is realised through one injection-locking stage. An experimental proof of concept is demonstrated for two 10 Gbps phase-encoded (DPSK) channels showing more than 7 dB phase-sensitive gain and less than 1 dB penalty of the receiver sensitivity.
Resumo:
Phase-locked loops (PLLs) are a crucial component in modern communications systems. Comprising of a phase-detector, linear filter, and controllable oscillator, they are widely used in radio receivers to retrieve the information content from remote signals. As such, they are capable of signal demodulation, phase and carrier recovery, frequency synthesis, and clock synchronization. Continuous-time PLLs are a mature area of study, and have been covered in the literature since the early classical work by Viterbi [1] in the 1950s. With the rise of computing in recent decades, discrete-time digital PLLs (DPLLs) are a more recent discipline; most of the literature published dates from the 1990s onwards. Gardner [2] is a pioneer in this area. It is our aim in this work to address the difficulties encountered by Gardner [3] in his investigation of the DPLL output phase-jitter where additive noise to the input signal is combined with frequency quantization in the local oscillator. The model we use in our novel analysis of the system is also applicable to another of the cases looked at by Gardner, that is the DPLL with a delay element integrated in the loop. This gives us the opportunity to look at this system in more detail, our analysis providing some unique insights into the variance `dip' seen by Gardner in [3]. We initially provide background on the probability theory and stochastic processes. These branches of mathematics are the basis for the study of noisy analogue and digital PLLs. We give an overview of the classical analogue PLL theory as well as the background on both the digital PLL and circle map, referencing the model proposed by Teplinsky et al. [4, 5]. For our novel work, the case of the combined frequency quantization and noisy input from [3] is investigated first numerically, and then analytically as a Markov chain via its Chapman-Kolmogorov equation. The resulting delay equation for the steady-state jitter distribution is treated using two separate asymptotic analyses to obtain approximate solutions. It is shown how the variance obtained in each case matches well to the numerical results. Other properties of the output jitter, such as the mean, are also investigated. In this way, we arrive at a more complete understanding of the interaction between quantization and input noise in the first order DPLL than is possible using simulation alone. We also do an asymptotic analysis of a particular case of the noisy first-order DPLL with delay, previously investigated by Gardner [3]. We show a unique feature of the simulation results, namely the variance `dip' seen for certain levels of input noise, is explained by this analysis. Finally, we look at the second-order DPLL with additive noise, using numerical simulations to see the effects of low levels of noise on the limit cycles. We show how these effects are similar to those seen in the noise-free loop with non-zero initial conditions.