Development of germanium/silicon integration for near infrared detection

Silicon (Si) is the base material for electronic technologies and is emerging as a very attractive platform for photonic integrated circuits (PICs). PICs allow optical systems to be made more compact with higher performance than discrete optical components. Applications for PICs are in the area of fibre-optic communication, biomedical devices, photovoltaics and imaging. Germanium (Ge), due to its suitable bandgap for telecommunications and its compatibility with Si technology is preferred over III-V compounds as an integrated on-chip detector at near infrared wavelengths. There are two main approaches for Ge/Si integration: through epitaxial growth and through direct wafer bonding. The lattice mismatch of ~4.2% between Ge and Si is the main problem of the former technique which leads to a high density of dislocations while the bond strength and conductivity of the interface are the main challenges of the latter. Both result in trap states which are expected to play a critical role. Understanding the physics of the interface is a key contribution of this thesis. This thesis investigates Ge/Si diodes using these two methods. The effects of interface traps on the static and dynamic performance of Ge/Si avalanche photodetectors have been modelled for the first time. The thesis outlines the original process development and characterization of mesa diodes which were fabricated by transferring a ~700 nm thick layer of p-type Ge onto n-type Si using direct wafer bonding and layer exfoliation. The effects of low temperature annealing on the device performance and on the conductivity of the interface have been investigated. It is shown that the diode ideality factor and the series resistance of the device are reduced after annealing. The carrier transport mechanism is shown to be dominated by generation–recombination before annealing and by direct tunnelling in forward bias and band-to-band tunnelling in reverse bias after annealing. The thesis presents a novel technique to realise photodetectors where one of the substrates is thinned by chemical mechanical polishing (CMP) after bonding the Si-Ge wafers. Based on this technique, Ge/Si detectors with remarkably high responsivities, in excess of 3.5 A/W at 1.55 μm at −2 V, under surface normal illumination have been measured. By performing electrical and optical measurements at various temperatures, the carrier transport through the hetero-interface is analysed by monitoring the Ge band bending from which a detailed band structure of the Ge/Si interface is proposed for the first time. The above unity responsivity of the detectors was explained by light induced potential barrier lowering at the interface. To our knowledge this is the first report of light-gated responsivity for vertically illuminated Ge/Si photodiodes. The wafer bonding approach followed by layer exfoliation or by CMP is a low temperature wafer scale process. In principle, the technique could be extended to other materials such as Ge on GaAs, or Ge on SOI. The unique results reported here are compatible with surface normal illumination and are capable of being integrated with CMOS electronics and readout units in the form of 2D arrays of detectors. One potential future application is a low-cost Si process-compatible near infrared camera.

Semiconductor nanowire fabrication via bottom-up & top-down paradigms

Semiconductor nanowires are pseudo 1-D structures where the magnitude of the semiconducting material is confined to a length of less than 100 nm in two dimensions. Semiconductor nanowires have a vast range of potential applications, including electronic (logic devices, diodes), photonic (laser, photodetector), biological (sensors, drug delivery), energy (batteries, solar cells, thermoelectric generators), and magnetic (spintronic, memory) devices. Semiconductor nanowires can be fabricated by a range of methods which can be categorised into one of two paradigms, bottom-up or top-down. Bottom-up processes can be defined as those where structures are assembled from their sub-components in an additive fashion. Top-down fabrication strategies use sculpting or etching to carve structures from a larger piece of material in a subtractive fashion. This seminar will detail a number of novel routes to fabricate semiconductor nanowires by both bottom-up and top-down paradigms. Firstly, a novel bottom-up route to fabricate Ge nanowires with controlled diameter distributions in the sub-20 nm regime will be described. This route details nanowire synthesis and diameter control in the absence of a foreign seed metal catalyst. Additionally a top-down route to nanowire array fabrication will be detailed outlining the importance of surface chemistry in high-resolution electron beam lithography (EBL) using hydrogen silsesquioxane (HSQ) on Ge and Bi2Se3 surfaces. Finally, a process will be described for the directed self-assembly of a diblock copolymer (PS-b-PDMS) using an EBL defined template. This section will also detail a route toward selective template sidewall wetting of either block in the PS-b-PDMS system, through tailored functionalisation of the template and substrate surfaces.

Fabrication and characterisation of semiconductor nanowires and metal interconnects

One-dimensional semiconductor nanowires are considered to be promising materials for future nanoelectronic applications. However, before these nanowires can be integrated into such applications, a thorough understanding of their growth behaviour is necessary. In particular, methods that allow the control over nanowire growth are deemed especially important as it is these methods that will enable the control of nanowire dimensions such as length and diameter (high aspect ratios). The production of nanowires with high-aspect ratios is vital in order to take advantage of the unique properties experienced at the nanoscale, thus allowing us to maximise their use in devices. Additionally, the development of low-resistivity interconnects is desirable in order to connect such nanowires in multi-nanowire components. Consequently, this thesis aims to discuss the synthesis and characterisation of germanium (Ge) nanowires and platinum (Pt) interconnects. Particular emphasis is placed on manipulating the nanowire growth kinetics to produce high aspect ratio structures. The discussion of Pt interconnects focuses on the development of low-resistivity devices and the electrical and structural analysis of those devices. Chapter 1 reviews the most critical aspects of Ge nanowire growth which must be understood before they can be integrated into future nanodevices. These features include the synthetic methods employed to grow Ge nanowires, the kinetic and thermodynamic aspects of their growth and nanowire morphology control. Chapter 2 outlines the experimental methods used to synthesise and characterise Ge nanowires as well as the methods used to fabricate and analyse Pt interconnects. Chapter 3 discusses the control of Ge nanowire growth kinetics via the manipulation of the supersaturation of Ge in the Au/Ge binary alloy system. This is accomplished through the use of bi-layer films, which pre-form Au/Ge alloy catalysts before the introduction of the Ge precursor. The growth from these catalysts is then compared with Ge nanowire growth from standard elemental Au seeds. Nanowires grown from pre-formed Au/Ge alloy seeds demonstrate longer lengths and higher growth rates than those grown from standard Au seeds. In-situ TEM heating on the Au/Ge bi-layer films is used to support the growth characteristics observed. Chapter 4 extends the work of chapter 3 by utilising Au/Ag/Ge tri-layer films to enhance the growth rates and lengths of Ge nanowires. These nanowires are grown from Au/Ag/Ge ternary alloy catalysts. Once again, the supersaturation is influenced, only this time it is through the simultaneous manipulation of both the solute concentration and equilibrium concentration of Ge in the Au/Ag/Ge ternary alloy system. The introduction of Ag to the Au/Ge binary alloy lowers the equilibrium concentration, thus increasing the nanowire growth rate and length. Nanowires with uniform diameters were obtained via synthesis from AuxAg1-x alloy nanoparticles. Manifestation of the Gibbs-Thomson effect, resulting from the dependence of the mean nanowire length as a function of diameter, was observed for all of the nanowires grown from the AuxAg1-x nanoparticles. Finally, in-situ TEM heating was used to support the nanowire growth characteristics. Chapter 5 details the fabrication and characterisation of Pt interconnects deposited by electron beam induced deposition of two different precursors. The fabrication is conducted inside a dual beam FIB. The electrical and structural characteristics of interconnects deposited from a standard organometallic precursor and a novel carbon-free precursor are compared. The electrical performance of the carbon-free interconnects is shown to be superior to that of the organometallic devices and this is correlated to the structural composition of both interconnects via in-situ TEM heating and HAADF-STEM analysis. Annealing of the interconnects is carried out under two different atmospheres in order to reduce the electrical resistivity even further. Finally, chapter 6 presents some important conclusions and summarises each of the previous chapters.

AuxAg1-x alloy seeds: A way to control growth, morphology and defect formation in Ge nanowires

Germanium (Ge) nanowires are of current research interest for high speed nanoelectronic devices due to the lower band gap and high carrier mobility compatible with high K-dielectrics and larger excitonic Bohr radius ensuing a more pronounced quantum confinement effect [1-6]. A general way for the growth of Ge nanowires is to use liquid or a solid growth promoters in a bottom-up approach which allow control of the aspect ratio, diameter, and structure of 1D crystals via external parameters, such as precursor feedstock, temperature, operating pressure, precursor flow rate etc [3, 7-11]. The Solid-phase seeding is preferred for more control processing of the nanomaterials and potential suppression of the unintentional incorporation of high dopant concentrations in semiconductor nanowires and unrequired compositional tailing of the seed-nanowire interface [2, 5, 9, 12]. There are therefore distinct features of the solid phase seeding mechanism that potentially offer opportunities for the controlled processing of nanomaterials with new physical properties. A superior control over the growth kinetics of nanowires could be achieved by controlling the inherent growth constraints instead of external parameters which always account for instrumental inaccuracy. The high dopant concentrations in semiconductor nanowires can result from unintentional incorporation of atoms from the metal seed material, as described for the Al catalyzed VLS growth of Si nanowires [13] which can in turn be depressed by solid-phase seeding. In addition, the creation of very sharp interfaces between group IV semiconductor segments has been achieved by solid seeds [14], whereas the traditionally used liquid Au particles often leads to compositional tailing of the interface [15] . Korgel et al. also described the superior size retention of metal seeds in a SFSS nanowire growth process, when compared to a SFLS process using Au colloids [12]. Here in this work we have used silver and alloy seed particle with different compositions to manipulate the growth of nanowires in sub-eutectic regime. The solid seeding approach also gives an opportunity to influence the crystallinity of the nanowires independent of the substrate. Taking advantage of the readily formation of stacking faults in metal nanoparticles, lamellar twins in nanowires could be formed.

Use of semiconductor optical amplifiers in signal processing applications

We describe a 42.6 Gbit/s all-optical pattern recognition system which uses semiconductor optical amplifiers (SOAs). A circuit with three SOA-based logic gates is used to identify the presence of specific port numbers in an optical packet header.

A study of silicon and germanium junctionless transistors

Technology boosters, such as strain, HKMG and FinFET, have been introduced into semiconductor industry to extend Moore’s law beyond 130 nm technology nodes. New device structures and channel materials are highly demanded to keep performance enhancement when the device scales beyond 22 nm. In this work, the properties and feasibility of the proposed Junctionless transistor (JNT) have been evaluated for both Silicon and Germanium channels. The performance of Silicon JNTs with 22 nm gate length have been characterized at elevated temperature and stressed conditions. Furthermore, steep Subthreshold Slopes (SS) in JNT and IM devices are compared. It is observed that the floating body in JNT is relatively dynamic comparing with that in IM devices and proper design of the device structure may further reduce the VD for a sub- 60 mV/dec subthreshold slope. Diode configuration of the JNT has also been evaluated, which demonstrates the first diode without junctions. In order to extend JNT structure into the high mobility material Germanium (Ge), a full process has been develop for Ge JNT. Germanium-on-Insulator (GeOI) wafers were fabricated using Smart-Cut with low temperature direct wafer bonding method. Regarding the lithography and pattern transfer, a top-down process of sub-50-nm width Ge nanowires is developed in this chapter and Ge nanowires with 35 nm width and 50 nm depth are obtained. The oxidation behaviour of Ge by RTO has been investigated and high-k passivation scheme using thermally grown GeO2 has been developed. With all developed modules, JNT with Ge channels have been fabricated by the CMOScompatible top-down process. The transistors exhibit the lowest subthreshold slope to date for Ge JNT. The devices with a gate length of 3 μm exhibit a SS of 216 mV/dec with an ION/IOFF current ratio of 1.2×103 at VD = -1 V and DIBL of 87 mV/V.

Synthesis & characterisation of group IV semiconducting nanowires

Semiconductor nanowires, particularly group 14 semiconductor nanowires, have been the subject of intensive research in the recent past. They have been demonstrated to provide an effective, versatile route towards the continued miniaturisation and improvement of microelectronics. This thesis aims to highlight some novel ways of fabricating and controlling various aspects of the growth of Si and Ge nanowires. Chapter 1 highlights the primary technique used for the growth of nanowires in this study, namely, supercritical fluid (SCF) growth reactions. The advantages (and disadvantages) of this technique for the growth of Si and Ge nanowires are highlighted, citing numerous examples from the past ten years. The many variables involved in this technique are discussed along with the resultant characteristics of nanowires produced (diameter, doping, orientation etc.). Chapter 2 outlines the experimental methodologies used in this thesis. The analytical techniques used for the structural characterisation of nanowires produced are also described as well as the techniques used for the chemical analysis of various surface terminations. Chapter 3 describes the controlled self-seeded growth of highly crystalline Ge nanowires, in the absence of conventional metal seed catalysts, using a variety of oligosilylgermane precursors and mixtures of germane and silane compounds. A model is presented which describes the main stages of self-seeded Ge nanowire growth (nucleation, coalescence and Ostwald ripening) from the oligosilylgermane precursors and in conjunction with TEM analysis, a mechanism of growth is proposed. Chapter 4 introduces the metal assisted etching (MAE) of Si substrates to produce Si nanowires. A single step metal-assisted etch (MAE) process, utilising metal ion-containing HF solutions in the absence of an external oxidant, was developed to generate heterostructured Si nanowires with controllable porous (isotropically etched) and non-porous (anisotropically etched) segments. In Chapter 5 the bottom-up growth of Ge nanowires, similar to that described in Chapter 3, and the top down etching of Si, described in Chapter 4, are combined. The introduction of a MAE processing step in order to “sink” the Ag seeds into the growth substrate, prior to nanowire growth, is shown to dramatically decrease the mean nanowire diameters and to narrow the diameter distributions. Finally, in Chapter 6, the biotin – streptavidin interaction was explored for the purposes of developing a novel Si junctionless nanowire transistor (JNT) sensor.

Properties and applications of injection locking in 1.55 μm quantum-dash mode-locked semiconductor lasers

Mode-locked semiconductor lasers are compact pulsed sources with ultra-narrow pulse widths and high repetition-rates. In order to use these sources in real applications, their performance needs to be optimised in several aspects, usually by external control. We experimentally investigate the behaviour of recently-developed quantum-dash mode-locked lasers (QDMLLs) emitting at 1.55 μm under external optical injection. Single-section and two-section lasers with different repetition frequencies and active-region structures are studied. Particularly, we are interested in a regime which the laser remains mode-locked and the individual modes are simultaneously phase-locked to the external laser. Injection-locked self-mode-locked lasers demonstrate tunable microwave generation at first or second harmonic of the free-running repetition frequency with sub-MHz RF linewidth. For two-section mode-locked lasers, using dual-mode optical injection (injection of two coherent CW lines), narrowing the RF linewidth close to that of the electrical source, narrowing the optical linewidths and reduction in the time-bandwidth product is achieved. Under optimised bias conditions of the slave laser, a repetition frequency tuning ratio >2% is achieved, a record for a monolithic semiconductor mode-locked laser. In addition, we demonstrate a novel all-optical stabilisation technique for mode-locked semiconductor lasers by combination of CW optical injection and optical feedback to simultaneously improve the time-bandwidth product and timing-jitter of the laser. This scheme does not need an RF source and no optical to electrical conversion is required and thus is ideal for photonic integration. Finally, an application of injection-locked mode-locked lasers is introduced in a multichannel phase-sensitive amplifier (PSA). We show that with dual-mode injection-locking, simultaneous phase-synchronisation of two channels to local pump sources is realised through one injection-locking stage. An experimental proof of concept is demonstrated for two 10 Gbps phase-encoded (DPSK) channels showing more than 7 dB phase-sensitive gain and less than 1 dB penalty of the receiver sensitivity.

Analysis and optimisation of semiconductor reflective modulators for optical networks

Reflective modulators based on the combination of an electroabsorption modulator (EAM) and semiconductor optical amplifier (SOA) are attractive devices for applications in long reach carrier distributed passive optical networks (PONs) due to the gain provided by the SOA and the high speed and low chirp modulation of the EAM. Integrated R-EAM-SOAs have experimentally shown two unexpected and unintuitive characteristics which are not observed in a single pass transmission SOA: the clamping of the output power of the device around a maximum value and low patterning distortion despite the SOA being in a regime of gain saturation. In this thesis a detailed analysis is carried out using both experimental measurements and modelling in order to understand these phenomena. For the first time it is shown that both the internal loss between SOA and R-EAM and the SOA gain play an integral role in the behaviour of gain saturated R-EAM-SOAs. Internal loss and SOA gain are also optimised for use in a carrier distributed PONs in order to access both the positive effect of output power clamping, and hence upstream dynamic range reduction, combined with low patterning operation of the SOA Reflective concepts are also gaining interest for metro transport networks and short reach, high bit rate, inter-datacentre links. Moving the optical carrier generation away from the transmitter also has potential advantages for these applications as it avoids the need for cooled photonics being placed directly on hot router line-cards. A detailed analysis is carried out in this thesis on a novel colourless reflective duobinary modulator, which would enable wavelength flexibility in a power-efficient reflective metro node.

All-optical signal processing using semiconductor optical amplifiers for next generation optical networks

This thesis details an experimental and simulation investigation of some novel all-optical signal processing techniques for future optical communication networks. These all-optical techniques include modulation format conversion, phase discrimination and clock recovery. The methods detailed in this thesis use the nonlinearities associated with semiconductor optical amplifiers (SOA) to manipulate signals in the optical domain. Chapter 1 provides an introduction into the work detailed in this thesis, discusses the increased demand for capacity in today’s optical fibre networks and finally explains why all-optical signal processing may be of interest for future optical networks. Chapter 2 discusses the relevant background information required to fully understand the all-optical techniques demonstrated in this thesis. Chapter 3 details some pump-probe measurement techniques used to calculate the gain and phase recovery times of a long SOA. A remarkably fast gain recovery is observed and the wavelength dependent nature of this recovery is investigated. Chapter 4 discusses the experimental demonstration of an all-optical modulation conversion technique which can convert on-off- keyed data into either duobinary or alternative mark inversion. In Chapter 5 a novel phase sensitive frequency conversion scheme capable of extracting the two orthogonal components of a quadrature phase modulated signal into two separate frequencies is demonstrated. Chapter 6 investigates a novel all-optical clock recovery technique for phase modulated optical orthogonal frequency division multiplexing superchannels and finally Chapter 7 provides a brief conclusion.

Novel processes, test structures and characterisation for future germanium technologies

In order to widely use Ge and III-V materials instead of Si in advanced CMOS technology, the process and integration of these materials has to be well established so that their high mobility benefit is not swamped by imperfect manufacturing procedures. In this dissertation number of key bottlenecks in realization of Ge devices are investigated; We address the challenge of the formation of low resistivity contacts on n-type Ge, comparing conventional and advanced rapid thermal annealing (RTA) and laser thermal annealing (LTA) techniques respectively. LTA appears to be a feasible approach for realization of low resistivity contacts with an incredibly sharp germanide-substrate interface and contact resistivity in the order of 10 -7 Ω.cm2. Furthermore the influence of RTA and LTA on dopant activation and leakage current suppression in n+/p Ge junction were compared. Providing very high active carrier concentration > 1020 cm-3, LTA resulted in higher leakage current compared to RTA which provided lower carrier concentration ~1019 cm-3. This is an indication of a trade-off between high activation level and junction leakage current. High ION/IOFF ratio ~ 107 was obtained, which to the best of our knowledge is the best reported value for n-type Ge so far. Simulations were carried out to investigate how target sputtering, dose retention, and damage formation is generated in thin-body semiconductors by means of energetic ion impacts and how they are dependent on the target physical material properties. Solid phase epitaxy studies in wide and thin Ge fins confirmed the formation of twin boundary defects and random nucleation growth, like in Si, but here 600 °C annealing temperature was found to be effective to reduce these defects. Finally, a non-destructive doping technique was successfully implemented to dope Ge nanowires, where nanowire resistivity was reduced by 5 orders of magnitude using PH3 based in-diffusion process.

Au nanorods-semiconductor nanowire hybrid nanostructures : nanofabrication techniques and optoelectronic properties

The objective of this thesis is the exploration and characterization of novel Au nanorod-semiconductor nanowire hybrid nanostructures. I provide a comprehensive bottom-up approach in which, starting from the synthesis and theoretical investigation of the optical properties of Au nanorods, I design, nanofabricate and characterize Au nanorods-semiconductor nanowire hybrid nanodevices with novel optoelectronic capabilities compared to the non-hybrid counterpart. In this regards, I first discuss the seed-mediated protocols to synthesize Au nanorods with different sizes and the influence of nanorod geometries and non-homogeneous surrounding medium on the optical properties investigated by theoretical simulation. Novel methodologies for assembling Au nanorods on (i) a Si/SiO2 substrate with highly-ordered architecture and (ii) on semiconductor nanowires with spatial precision are developed and optimized. By exploiting these approaches, I demonstrate that Raman active modes of an individual ZnO nanowire can be detected in non-resonant conditions by exploring the longitudinal plasmonic resonance mediation of chemical-synthesized Au nanorods deposited on the nanowire surface otherwise not observable on bare ZnO nanowire. Finally, nanofabrication and detailed electrical characterization of ZnO nanowire field-effect transistor (FET) and optoelectronic properties of Au nanorods - ZnO nanowire FET tunable near-infrared photodetector are investigated. In particular we demonstrated orders of magnitude enhancement in the photocurrent intensity in the explored range of wavelengths and 40 times faster time response compared to the bare ZnO FET detector. The improved performance, attributed to the plasmonicmediated hot-electron generation and injection mechanism underlying the photoresponse is investigated both experimentally and theoretically. The miniaturized, tunable and integrated capabilities offered by metal nanorodssemicondictor nanowire device architectures presented in this thesis work could have an important impact in many application fields such as opto-electronic sensors, photodetectors and photovoltaic devices and open new avenues for designing of novel nanoscale optoelectronic devices.

First principles simulation of amorphous silicon bulk, interfaces, and nanowires for photovoltaics

Amorphous silicon has become the material of choice for many technologies, with major applications in large area electronics: displays, image sensing and thin film photovoltaic cells. This technology development has occurred because amorphous silicon is a thin film semiconductor that can be deposited on large, low cost substrates using low temperature. In this thesis, classical molecular dynamics and first principles DFT calculations have been performed to generate structural models of amorphous and hydrogenated amorphous silicon and interfaces of amorphous and crystalline silicon, with the ultimate aim of understanding the photovoltaic properties of core-shell crystalline amorphous Si nanowire structures. We have shown, unexpectedly, from the simulations, that our understanding of hydrogenated bulk a-Si needs to be revisited, with our robust finding that when fully saturated with hydrogen, bulk a-Si exhibits a constant optical energy gap, irrespective of the hydrogen concentration in the sample. Unsaturated a-Si:H, with a lower than optimum hydrogen content, shows a smaller optical gap, that increases with hydrogen content until saturation is reached. The mobility gaps obtained from an analysis of the electronic states show similar behavior. We also obtained that the optical and mobility gaps show a volcano curve as the H content is varied from 7% (undersaturation) to 18% (mild oversaturation). In the case of mild over saturation, the mid-gap states arise exclusively from an increase in the density of strained Si-Si bonds. Analysis of our structures shows the extra H atoms in this case form a bridge between neighboring silicon atoms which increases the corresponding Si-Si distance and promotes bond length disorder in the sample. That has the potential to enhance the Staebler-Wronski effect. Planar interface models of amorphous-crystalline silicon have been generated in Si (100), (110) and (111) surfaces. The interface models are characterized by structure, RDF, electronic density of states and optical absorption spectrum. We find that the least stable (100) surface will result in the formation of the thickest amorphous silicon layer, while the most stable (110) surface forms the smallest amorphous region. We calculated for the first time band offsets of a-Si:H/c-Si heterojunctions from first principles and examined the influence of different surface orientations and amorphous layer thickness on the offsets and implications for device performance. The band offsets depend on the amorphous layer thickness and increase with thickness. By controlling the amorphous layer thickness we can potentially optimise the solar cell parameters. Finally, we have successfully generated different amorphous layer thickness of the a-Si/c-Si and a-Si:H/c-Si 5 nm nanowires from heat and quench. We perform structural analysis of the a-Si-/c-Si nanowires. The RDF, Si-Si bond length distributions, and the coordination number distributions of amorphous regions of the nanowires reproduce similar behaviour compared to bulk amorphous silicon. In the final part of this thesis we examine different surface terminating chemical groups, -H, - OH and –NH2 in (001) GeNW. Our work shows that the diameter of Ge nanowires and the nature of surface terminating groups both play a significant role in both the magnitude and the nature of the nanowire band gaps, allowing tuning of the band gap by up to 1.1 eV. We also show for the first time how the nanowire diameter and surface termination shifts the absorption edge in the Ge nanowires to longer wavelengths. Thus, the combination of nanowire diameter and surface chemistry can be effectively utilised to tune the band gaps and thus light absorption properties of small diameter Ge nanowires.

Synthesis, functionalisation and characterisation of germanium nanocrystals & their applications

In the last two decades, semiconductor nanocrystals have been the focus of intense research due to their size dependant optical and electrical properties. Much is now known about how to control their size, shape, composition and surface chemistry, allowing fine control of their photophysical and electronic properties. However, genuine concerns have been raised regarding the heavy metal content of these materials, which is toxic even at relatively low concentrations and may limit their wide scale use. These concerns have driven the development of heavy metal free alternatives. In recent years, germanium nanocrystals (Ge NCs) have emerged as environmentally friendlier alternatives to II-VI and IV-VI semiconductor materials as they are nontoxic, biocompatible and electrochemically stable. This thesis reports the synthesis and characterisation of Ge NCs and their application as fluorescence probes for the detection of metal ions. A room-temperature method for the synthesis of size monodisperse Ge NCs within inverse micelles is reported, with well-defined core diameters that may be tuned from 3.5 to 4.5 nm. The Ge NCs are chemically passivated with amine ligands, minimising surface oxidation while rendering the NCs dispersible in a range of polar solvents. Regulation of the Ge NCs size is achieved by variation of the ammonium salts used to form the micelles. A maximum quantum yield of 20% is shown for the nanocrystals, and a transition from primarily blue to green emission is observed as the NC diameter increases from 3.5 to 4.5 nm. A polydisperse sample with a mixed emission profile is prepared and separated by centrifugation into individual sized NCs which each showed blue and green emission only, with total suppression of other emission colours. A new, efficient one step synthesis of Ge NCs with in situ passivation and straightforward purification steps is also reported. Ge NCs are formed by co-reduction of a mixture of GeCl4 and n-butyltrichlorogermane; the latter is used both as a capping ligand and a germanium source. The surface-bound layer of butyl chains both chemically passivates and stabilises the Ge NCs. Optical spectroscopy confirmed that these NCs are in the strong quantum confinement regime, with significant involvement of surface species in exciton recombination processes. The PL QY is determined to be 37 %, one of the highest values reported for organically terminated Ge NCs. A synthetic method is developed to produce size monodisperse Ge NCs with modified surface chemistries bearing carboxylic acid, acetate, amine and epoxy functional groups. The effect of these different surface terminations on the optical properties of the NCs is also studied. Comparison of the emission properties of these Ge NCs showed that the wavelength position of the PL maxima could be moved from the UV to the blue/green by choice of the appropriate surface group. We also report the application of water-soluble Ge NCs as a fluorescent sensing platform for the fast, highly selective and sensitive detection of Fe3+ ions. The luminescence quenching mechanism is confirmed by lifetime and absorbance spectroscopies, while the applicability of this assay for detection of Fe3+ in real water samples is investigated and found to satisfy the US Environmental Protection Agency requirements for Fe3+ levels in drinkable water supplies.