Development of block copolymer lithography for device structure fabrication

This thesis investigated well-ordered block copolymer (BCP) thin film characteristics and their use for nanoscale pattern formation using a series of polystyrene-block-polymethylmethacrylate (PS-b-PMMA), polystyrene-blockpolydimethylsiloxane (PS-b-PDMS) and polystyrene-block-poly(ethylene oxide) (PS-b-PEO) systems of various molecular weights. BCP thin films, which act as an ‘on-chip’ etch mask and material templates, are highly promising self-assembling process for future scalable nanolithography. Unlike conventional BCP processing methods, the work in this thesis demonstrates that well-ordered patterns can be achieved in a few seconds compared to several hours by use of a non-conventional microwave assisted technique. As a result, well-ordered BCP nanoscale structures can be developed in industry appropriate periods facilitating their incorporation into current technologies. An optimised and controlled plasma dry etch process was used for successful pattern transfer to the underlying silicon substrate. Long range ordered BCP templates were further modified by selective metal inclusion technique to form a hard mask template towards fabrication of high aspect ratio nanopillars and nanowires. The work described here is centred on how these templates might be used to generate function at substrate surfaces. Herein we describe a number of innovations which might allow their successful uptake in a number of applications.

Formation of sub-7 nm feature size PS-b-P4VP block copolymer structures by solvent vapour process

The nanometer range structure produced by thin films of diblock copolymers makes them a great of interest as templates for the microelectronics industry. We investigated the effect of annealing solvents and/or mixture of the solvents in case of symmetric Poly (styrene-block-4vinylpyridine) (PS-b-P4VP) diblock copolymer to get the desired line patterns. In this paper, we used different molecular weights PS-b-P4VP to demonstrate the scalability of such high χ BCP system which requires precise fine-tuning of interfacial energies achieved by surface treatment and that improves the wetting property, ordering, and minimizes defect densities. Bare Silicon Substrates were also modified with polystyrene brush and ethylene glycol self-assembled monolayer in a simple quick reproducible way. Also, a novel and simple in situ hard mask technique was used to generate sub-7nm Iron oxide nanowires with a high aspect ratio on Silicon substrate, which can be used to develop silicon nanowires post pattern transfer.

Block copolymer self-assembly based device structures

This thesis investigated the block copolymer (BCP) thin film characteristics and pattern formation using a set of predetermined molecular weights of PS-b-PMMA and PS-b-PDMS. Post BCP pattern fabrication on the required base substrate a dry plasma etch process was utilised for successful pattern transfer of the BCP resist onto underlying substrate. The resultant sub-10 nm device features were used in front end of line (FEoL) fabrication of active device components in integrated circuits (IC). The potential use of BCP templates were further extended to metal and metal-oxide nanowire fabrication. These nanowires were further investigated in real-time applications as novel sensors and supercapacitors.

Insertion of metal oxides into block copolymer nanopatterns as robust etch masks for nanolithography

Directed self-assembly (DSA) of block copolymers (BCPs) is a prime candidate to further extend dimensional scaling of silicon integrated circuit features for the nanoelectronic industry. Top-down optical techniques employed for photoresist patterning are predicted to reach an endpoint due to diffraction limits. Additionally, the prohibitive costs for “fabs” and high volume manufacturing tools are issues that have led the search for alternative complementary patterning processes. This thesis reports the fabrication of semiconductor features from nanoscale on-chip etch masks using “high χ” BCP materials. Fabrication of silicon and germanium nanofins via metal-oxide enhanced BCP on-chip etch masks that might be of importance for future Fin-field effect transistor (FinFETs) application are detailed.