A tight-binding analysis of the electronic properties of III-nitride semiconductors

This thesis divides into two distinct parts, both of which are underpinned by the tight-binding model. The first part covers our implementation of the tight-binding model in conjunction with the Berry phase theory of electronic polarisation to probe the atomistic origins of spontaneous polarisation and piezoelectricity as well as attempting to accurately calculate the values and coefficients associated with these phenomena. We first develop an analytic model for the polarisation of a one-dimensional linear chain of atoms. We compare the zincblende and ideal wurtzite structures in terms of effective charges, spontaneous polarisation and piezoelectric coefficients, within a first nearest neighbour tight-binding model. We further compare these to real wurtzite structures and conclude that accurate quantitative results are beyond the scope of this model but qualitative trends can still be described. The second part of this thesis deals with implementing the tight-binding model to investigate the effect of local alloy fluctuations in bulk AlGaN alloys and InGaN quantum wells. We calculate the band gap evolution of Al1_xGaxN across the full composition range and compare it to experiment as well as fitting bowing parameters to the band gap as well as to the conduction band and valence band edges. We also investigate the wavefunction character of the valence band edge to determine the composition at which the optical polarisation switches in Al1_xGaxN alloys. Finally, we examine electron and hole localisation in InGaN quantum wells. We show how the built-in field localises the carriers along the c-axis and how local alloy fluctuations strongly localise the highest hole states in the c-plane, while the electrons remain delocalised in the c-plane. We show how this localisation affects the charge density overlap and also investigate the effect of well width fluctuations on the localisation of the electrons.

Average-case analysis of power consumption in embedded systems

Power efficiency is one of the most important constraints in the design of embedded systems since such systems are generally driven by batteries with limited energy budget or restricted power supply. In every embedded system, there are one or more processor cores to run the software and interact with the other hardware components of the system. The power consumption of the processor core(s) has an important impact on the total power dissipated in the system. Hence, the processor power optimization is crucial in satisfying the power consumption constraints, and developing low-power embedded systems. A key aspect of research in processor power optimization and management is “power estimation”. Having a fast and accurate method for processor power estimation at design time helps the designer to explore a large space of design possibilities, to make the optimal choices for developing a power efficient processor. Likewise, understanding the processor power dissipation behaviour of a specific software/application is the key for choosing appropriate algorithms in order to write power efficient software. Simulation-based methods for measuring the processor power achieve very high accuracy, but are available only late in the design process, and are often quite slow. Therefore, the need has arisen for faster, higher-level power prediction methods that allow the system designer to explore many alternatives for developing powerefficient hardware and software. The aim of this thesis is to present fast and high-level power models for the prediction of processor power consumption. Power predictability in this work is achieved in two ways: first, using a design method to develop power predictable circuits; second, analysing the power of the functions in the code which repeat during execution, then building the power model based on average number of repetitions. In the first case, a design method called Asynchronous Charge Sharing Logic (ACSL) is used to implement the Arithmetic Logic Unit (ALU) for the 8051 microcontroller. The ACSL circuits are power predictable due to the independency of their power consumption to the input data. Based on this property, a fast prediction method is presented to estimate the power of ALU by analysing the software program, and extracting the number of ALU-related instructions. This method achieves less than 1% error in power estimation and more than 100 times speedup in comparison to conventional simulation-based methods. In the second case, an average-case processor energy model is developed for the Insertion sort algorithm based on the number of comparisons that take place in the execution of the algorithm. The average number of comparisons is calculated using a high level methodology called MOdular Quantitative Analysis (MOQA). The parameters of the energy model are measured for the LEON3 processor core, but the model is general and can be used for any processor. The model has been validated through the power measurement experiments, and offers high accuracy and orders of magnitude speedup over the simulation-based method.