The print block and the digital cylinder

Purpose – To consider the economic and physical impact of electronic journals on remotely stored print stock. Design/methodology/approach – A collection of print journals was used as an object for consideration. Physical and heritage aspects of the collection are examined and questions are posed regarding the wisdom of future retention in response to increased demand for electronic alternatives. Findings – Emerging trends predict a predominance of periodical literature in electronic form. The future of local remote storage for low demand printed journal collections needs to be evaluated in economic as well as cultural terms. Research limitations/implications – Based on a collection at the Boole Library, University College Cork, Ireland. Practical implications – Similar consideration should be given to collections in other regional libraries. Originality/value – Contributes to discussions on the long-term value of retaining print journal holdings.

Block copolymer self-assembly based device structures

This thesis investigated the block copolymer (BCP) thin film characteristics and pattern formation using a set of predetermined molecular weights of PS-b-PMMA and PS-b-PDMS. Post BCP pattern fabrication on the required base substrate a dry plasma etch process was utilised for successful pattern transfer of the BCP resist onto underlying substrate. The resultant sub-10 nm device features were used in front end of line (FEoL) fabrication of active device components in integrated circuits (IC). The potential use of BCP templates were further extended to metal and metal-oxide nanowire fabrication. These nanowires were further investigated in real-time applications as novel sensors and supercapacitors.

Simplified decoding techniques for linear block codes

Error correcting codes are combinatorial objects, designed to enable reliable transmission of digital data over noisy channels. They are ubiquitously used in communication, data storage etc. Error correction allows reconstruction of the original data from received word. The classical decoding algorithms are constrained to output just one codeword. However, in the late 50’s researchers proposed a relaxed error correction model for potentially large error rates known as list decoding. The research presented in this thesis focuses on reducing the computational effort and enhancing the efficiency of decoding algorithms for several codes from algorithmic as well as architectural standpoint. The codes in consideration are linear block codes closely related to Reed Solomon (RS) codes. A high speed low complexity algorithm and architecture are presented for encoding and decoding RS codes based on evaluation. The implementation results show that the hardware resources and the total execution time are significantly reduced as compared to the classical decoder. The evaluation based encoding and decoding schemes are modified and extended for shortened RS codes and software implementation shows substantial reduction in memory footprint at the expense of latency. Hermitian codes can be seen as concatenated RS codes and are much longer than RS codes over the same aphabet. A fast, novel and efficient VLSI architecture for Hermitian codes is proposed based on interpolation decoding. The proposed architecture is proven to have better than Kötter’s decoder for high rate codes. The thesis work also explores a method of constructing optimal codes by computing the subfield subcodes of Generalized Toric (GT) codes that is a natural extension of RS codes over several dimensions. The polynomial generators or evaluation polynomials for subfield-subcodes of GT codes are identified based on which dimension and bound for the minimum distance are computed. The algebraic structure for the polynomials evaluating to subfield is used to simplify the list decoding algorithm for BCH codes. Finally, an efficient and novel approach is proposed for exploiting powerful codes having complex decoding but simple encoding scheme (comparable to RS codes) for multihop wireless sensor network (WSN) applications.

Development of block copolymer lithography for device structure fabrication

This thesis investigated well-ordered block copolymer (BCP) thin film characteristics and their use for nanoscale pattern formation using a series of polystyrene-block-polymethylmethacrylate (PS-b-PMMA), polystyrene-blockpolydimethylsiloxane (PS-b-PDMS) and polystyrene-block-poly(ethylene oxide) (PS-b-PEO) systems of various molecular weights. BCP thin films, which act as an ‘on-chip’ etch mask and material templates, are highly promising self-assembling process for future scalable nanolithography. Unlike conventional BCP processing methods, the work in this thesis demonstrates that well-ordered patterns can be achieved in a few seconds compared to several hours by use of a non-conventional microwave assisted technique. As a result, well-ordered BCP nanoscale structures can be developed in industry appropriate periods facilitating their incorporation into current technologies. An optimised and controlled plasma dry etch process was used for successful pattern transfer to the underlying silicon substrate. Long range ordered BCP templates were further modified by selective metal inclusion technique to form a hard mask template towards fabrication of high aspect ratio nanopillars and nanowires. The work described here is centred on how these templates might be used to generate function at substrate surfaces. Herein we describe a number of innovations which might allow their successful uptake in a number of applications.

Insertion of metal oxides into block copolymer nanopatterns as robust etch masks for nanolithography

Directed self-assembly (DSA) of block copolymers (BCPs) is a prime candidate to further extend dimensional scaling of silicon integrated circuit features for the nanoelectronic industry. Top-down optical techniques employed for photoresist patterning are predicted to reach an endpoint due to diffraction limits. Additionally, the prohibitive costs for “fabs” and high volume manufacturing tools are issues that have led the search for alternative complementary patterning processes. This thesis reports the fabrication of semiconductor features from nanoscale on-chip etch masks using “high χ” BCP materials. Fabrication of silicon and germanium nanofins via metal-oxide enhanced BCP on-chip etch masks that might be of importance for future Fin-field effect transistor (FinFETs) application are detailed.