Novel processes, test structures and characterisation for future germanium technologies

In order to widely use Ge and III-V materials instead of Si in advanced CMOS technology, the process and integration of these materials has to be well established so that their high mobility benefit is not swamped by imperfect manufacturing procedures. In this dissertation number of key bottlenecks in realization of Ge devices are investigated; We address the challenge of the formation of low resistivity contacts on n-type Ge, comparing conventional and advanced rapid thermal annealing (RTA) and laser thermal annealing (LTA) techniques respectively. LTA appears to be a feasible approach for realization of low resistivity contacts with an incredibly sharp germanide-substrate interface and contact resistivity in the order of 10 -7 Ω.cm2. Furthermore the influence of RTA and LTA on dopant activation and leakage current suppression in n+/p Ge junction were compared. Providing very high active carrier concentration > 1020 cm-3, LTA resulted in higher leakage current compared to RTA which provided lower carrier concentration ~1019 cm-3. This is an indication of a trade-off between high activation level and junction leakage current. High ION/IOFF ratio ~ 107 was obtained, which to the best of our knowledge is the best reported value for n-type Ge so far. Simulations were carried out to investigate how target sputtering, dose retention, and damage formation is generated in thin-body semiconductors by means of energetic ion impacts and how they are dependent on the target physical material properties. Solid phase epitaxy studies in wide and thin Ge fins confirmed the formation of twin boundary defects and random nucleation growth, like in Si, but here 600 °C annealing temperature was found to be effective to reduce these defects. Finally, a non-destructive doping technique was successfully implemented to dope Ge nanowires, where nanowire resistivity was reduced by 5 orders of magnitude using PH3 based in-diffusion process.

Study of the kinetics and mechanism of rapid self-assembly in block copolymer thin films during solvo-microwave annealing

Microwave annealing is an emerging technique for achieving ordered patterns of block copolymer films on substrates. Little is understood about the mechanisms of microphase separation during the microwave annealing process and how it promotes the microphase separation of the blocks. Here, we use controlled power microwave irradiation in the presence of tetrahydrofuran (THF) solvent, to achieve lateral microphase separation in high- lamellar-forming poly(styrene-b-lactic acid) PS-b-PLA. A highly ordered line pattern was formed within seconds on silicon, germanium and silicon on insulator (SOI) substrates. In-situ temperature measurement of the silicon substrate coupled to condition changes during "solvo-microwave" annealing allowed understanding of the processes to be attained. Our results suggest that the substrate has little effect on the ordering process and is essentially microwave transparent but rather, it is direct heating of the polar THF molecules that causes microphase separation. It is postulated that the rapid interaction of THF with microwaves and the resultant temperature increase to 55 degrees C within seconds causes an increase of the vapor pressure of the solvent from 19.8 to 70 kPa. This enriched vapor environment increases the plasticity of both PS and PLA chains and leads to the fast self-assembly kinetics. Comparing the patterns formed on silicon, germanium and silicon on insulator (SOI) and also an in situ temperature measurement of silicon in the oven confirms the significance of the solvent over the role of substrate heating during "solvo-microwave" annealing. Besides the short annealing time which has technological importance, the coherence length is on a micron scale and dewetting is not observed after annealing. The etched pattern (PLA was removed by an Ar/O-2 reactive ion etch) was transferred to the underlying silicon substrate fabricating sub-20 nm silicon nanowires over large areas demonstrating that the morphology is consistent both across and through the film.

Self-healing thermal annealing: surface morphological restructuring control of GaN nanorods

With advances in nanolithography and dry etching, top-down methods of nanostructuring have become a widely used tool for improving the efficiency of optoelectronics. These nano dimensions can offer various benefits to the device performance in terms of light extraction and efficiency, but often at the expense of emission color quality. Broadening of the target emission peak and unwanted yellow luminescence are characteristic defect-related effects due to the ion beam etching damage, particularly for III–N based materials. In this article we focus on GaN based nanorods, showing that through thermal annealing the surface roughness and deformities of the crystal structure can be “self-healed”. Correlative electron microscopy and atomic force microscopy show the change from spherical nanorods to faceted hexagonal structures, revealing the temperature-dependent surface morphology faceting evolution. The faceted nanorods were shown to be strain- and defect-free by cathodoluminescence hyperspectral imaging, micro-Raman, and transmission electron microscopy (TEM). In-situ TEM thermal annealing experiments allowed for real time observation of dislocation movements and surface restructuring observed in ex-situ annealing TEM sampling. This thermal annealing investigation gives new insight into the redistribution path of GaN material and dislocation movement post growth, allowing for improved understanding and in turn advances in optoelectronic device processing of compound semiconductors.