Mechanism that dictates pore width and <111>a pore propagation in InP

We report a mechanism for pore growth and propagation based on a three-step charge transfer model. The study is supported by electron microscopy analysis of highly doped n-InP samples anodised in aqueous KOH. The model and experimental data are used to explain propagation of pores of characteristic diameter preferentially along the <111>A directions. We also show evidence for deviation of pore growth from the <111>A directions and explain why such deviations should occur. The model is self-consistent and predicts how carrier concentration affects the internal dimensions of the porous structures.

Experimental study of quantum dot and dash lasers

Quantum dashes are elongated quantum dots. Polarized edge-photovoltage and spontaneous emission spectroscopy are used to study the anisotropy of optical properties in 1.5μm InGaAsP and AlGaInAs-based quantum dash lasers. Strain, which causes TM-polarized transitions to be suppressed at the band edge, coupled with carrier confinement and dash shape leads to an enhancement of the optical properties for light polarized along the dash long axis, in excellent agreement with theoretical results. An analysis of the integrated facet and spontaneous emission rate with total current and temperature reveals that, in both undoped and p-doped InGaAsP-based quantum dash lasers at room temperature, the threshold current and its temperature dependence remain dominated by Auger recombination. We also identify two processes which can limit the output power and propose that the effects of the dopant in p-doped InGaAsP-based lasers dominate at low temperature but decrease with increasing temperature. A high threshold current density in undoped AlGaInAs-based quantum dash laser samples studied, which degrade rapidly at low temperature, is not due to intrinsic carrier recombination processes. 1.3μm GaAs-based quantum dots lasers have been widely studied, but there remains issues as to the nature of the electronic structure. Polarized edge-photovoltage spectroscopy is used to investigate the energy distribution and nature of the energy states in InAs/GaAs quantum dot material. A non-negligible TM-polarized transition, which is often neglected in calculations and analyses, is measured close to the main TE-polarized ground state transition. Theory is in very good agreement with the experimental results and indicates that the measured low-energy TM-polarized transition is due to the strong spatial overlap between the ground state electron and the light-hole component of a low-lying excited hole state. Further calculations suggest that the TM-polarized transition reduces at the band edge as the quantum dot aspect ratio decreases.

Atomic layer deposition of interface control layers for the fabrication of III/V MOS devices

The continued advancement of metal oxide semiconductor field effect transistor (MOSFET) technology has shifted the focus from Si/SiO2 transistors towards high-κ/III-V transistors for high performance, faster devices. This has been necessary due to the limitations associated with the scaling of the SiO2 thickness below ~1 nm and the associated increased leakage current due to direct electron tunnelling through the gate oxide. The use of these materials exhibiting lower effective charge carrier mass in conjunction with the use of a high-κ gate oxide allows for the continuation of device scaling and increases in the associated MOSFET device performance. The high-κ/III-V interface is a critical challenge to the integration of high-κ dielectrics on III-V channels. The interfacial chemistry of the high-κ/III-V system is more complex than Si, due to the nature of the multitude of potential native oxide chemistries at the surface with the resultant interfacial layer showing poor electrical insulating properties when high-κ dielectrics are deposited directly on these oxides. It is necessary to ensure that a good quality interface is formed in order to reduce leakage and interface state defect density to maximise channel mobility and reduce variability and power dissipation. In this work, the ALD growth of aluminium oxide (Al2O3) and hafnium oxide (HfO2) after various surface pre-treatments was carried out, with the aim of improving the high-κ/III-V interface by reducing the Dit – the density of interface defects caused by imperfections such as dangling bonds, dimers and other unsatisfied bonds at the interfaces of materials. A brief investigation was performed into the structural and electrical properties of Al2O3 films deposited on In0.53Ga0.47As at 200 and 300oC via a novel amidinate precursor. Samples were determined to experience a severe nucleation delay when deposited directly on native oxides, leading to diminished functionality as a gate insulator due to largely reduced growth per cycle. Aluminium oxide MOS capacitors were prepared by ALD and the electrical characteristics of GaAs, In0.53Ga0.47As and InP capacitors which had been exposed to pre-pulse treatments from triethyl gallium and trimethyl indium were examined, to determine if self-cleaning reactions similar to those of trimethyl aluminium occur for other alkyl precursors. An improved C-V characteristic was observed for GaAs devices indicating an improved interface possibly indicating an improvement of the surface upon pre-pulsing with TEG, conversely degraded electrical characteristics observed for In0.53Ga0.47As and InP MOS devices after pre-treatment with triethyl gallium and trimethyl indium respectively. The electrical characteristics of Al2O3/In0.53Ga0.47As MOS capacitors after in-situ H2/Ar plasma treatment or in-situ ammonium sulphide passivation were investigated and estimates of interface Dit calculated. The use of plasma reduced the amount of interface defects as evidenced in the improved C-V characteristics. Samples treated with ammonium sulphide in the ALD chamber were found to display no significant improvement of the high-κ/III-V interface. HfO2 MOS capacitors were fabricated using two different precursors comparing the industry standard hafnium chloride process with deposition from amide precursors incorporating a ~1nm interface control layer of aluminium oxide and the structural and electrical properties investigated. Capacitors furnished from the chloride process exhibited lower hysteresis and improved C-V characteristics as compared to that of hafnium dioxide grown from an amide precursor, an indication that no etching of the film takes place using the chloride precursor in conjunction with a 1nm interlayer. Optimisation of the amide process was carried out and scaled samples electrically characterised in order to determine if reduced bilayer structures display improved electrical characteristics. Samples were determined to exhibit good electrical characteristics with a low midgap Dit indicative of an unpinned Fermi level

Langmuir-Blodgett assembly of colloidal crystals combined with controlled infiltration of conducting metal oxides

Colloidal photonic crystals (PhCs) possess a periodic dielectric structure which gives rise to a photonic band gap (PBG) and offer great potential in the ability to modify or control light at visible wavelengths. Although the refractive index contrast between the void or infill and the matrix material is paramount for photonics applications, integration into real optoelectronics devices will require a range of added functionalities such as conductivity. As such, colloidal PhCs can be used as templates to direct infiltration of other functional materials using a range of deposition strategies. The work in this thesis seeks to address two challenges; first to develop a reproducible strategy based on Langmuir-Blodgett (LB) deposition to assemble high quality colloidal PhCs based on silica with precise film thickness as most other assembly methods suffer from a lack of reproducibility thickness control. The second is to investigate the use of LBdeposited colloidal PhCs as templates for infiltration with conducting metal oxide materials using vapor phase deposition techniques. Part of this work describes the synthesis and assembly of colloidal silica spheres with different surface chemical functionalities at the air-water interface in preparation for LB deposition. Modification of surface funtionality conferred varying levels of hydrophobicity upon the particles. The behaviour of silica monolayer films at the air-water interface was characterised by Brewster Angle Microscopy and surface pressure isotherms with a view to optimising the parameters for LB deposition of multilayer colloidal PhC films. Optical characterisation of LB-fabricated colloidal PhCs indicated high quality photonic behaviour, exhibiting a pseudo PBG with a sharp Bragg diffraction peak in the visible region and reflectance intensities greater than 60%. Finally the atomic layer deposition (ALD) of nominally undoped ZnO and aluminium “doped” ZnO (Al-doped ZnO) inside the pores of a colloidal PhC assembled by the LB technique was carried out. ALD growth in this study was performed using trimethyl aluminium (TMA) and water as precursors for the alumina and diethyl zinc (DEZn) and water for the ZnO. The ZnO:Al films were grown in a laminate mode, where DEZn pulses were substituted for TMA pulses in the sequences with a Zn:Al ratio 19:1. The ALD growth of ZnO and ZnO:Al in colloidal PhCs was shown to be highly conformal, tuneable and reproducible whilst maintaining excellent photonic character. Furthermore, at high levels of infiltration the opal composite films demonstrated significant conductivity.

Effects of alternating current voltage amplitude and oxide capacitance on mid-gap interface state defect density extractions in In0.53Ga 0.47As capacitors

This work looks at the effect on mid-gap interface state defect density estimates for In0.53Ga0.47As semiconductor capacitors when different AC voltage amplitudes are selected for a fixed voltage bias step size (100 mV) during room temperature only electrical characterization. Results are presented for Au/Ni/Al2O3/In0.53Ga0.47As/InP metal–oxide–semiconductor capacitors with (1) n-type and p-type semiconductors, (2) different Al2O3 thicknesses, (3) different In0.53Ga0.47As surface passivation concentrations of ammonium sulphide, and (4) different transfer times to the atomic layer deposition chamber after passivation treatment on the semiconductor surface—thereby demonstrating a cross-section of device characteristics. The authors set out to determine the importance of the AC voltage amplitude selection on the interface state defect density extractions and whether this selection has a combined effect with the oxide capacitance. These capacitors are prototypical of the type of gate oxide material stacks that could form equivalent metal–oxide–semiconductor field-effect transistors beyond the 32 nm technology node. The authors do not attempt to achieve the best scaled equivalent oxide thickness in this work, as our focus is on accurately extracting device properties that will allow the investigation and reduction of interface state defect densities at the high-k/III–V semiconductor interface. The operating voltage for future devices will be reduced, potentially leading to an associated reduction in the AC voltage amplitude, which will force a decrease in the signal-to-noise ratio of electrical responses and could therefore result in less accurate impedance measurements. A concern thus arises regarding the accuracy of the electrical property extractions using such impedance measurements for future devices, particularly in relation to the mid-gap interface state defect density estimated from the conductance method and from the combined high–low frequency capacitance–voltage method. The authors apply a fixed voltage step of 100 mV for all voltage sweep measurements at each AC frequency. Each of these measurements is repeated 15 times for the equidistant AC voltage amplitudes between 10 mV and 150 mV. This provides the desired AC voltage amplitude to step size ratios from 1:10 to 3:2. Our results indicate that, although the selection of the oxide capacitance is important both to the success and accuracy of the extraction method, the mid-gap interface state defect density extractions are not overly sensitive to the AC voltage amplitude employed regardless of what oxide capacitance is used in the extractions, particularly in the range from 50% below the voltage sweep step size to 50% above it. Therefore, the use of larger AC voltage amplitudes in this range to achieve a better signal-to-noise ratio during impedance measurements for future low operating voltage devices will not distort the extracted interface state defect density.