2 resultados para Abstraction
em Repository Napier
Resumo:
Clonal selection has been a dominant theme in many immune-inspired algorithms applied to machine learning and optimisation. We examine existing clonal selections algorithms for learning from a theoertical and empirical perspective and assert that the widely accepted computational interpretation of clonal selection is compromised both algorithmically andbiologically. We suggest a more capable abstraction of the clonal selection principle grounded in probabilistic estimation and approximation and demonstrate how it addresses some of the shortcomings in existing algorithms. We further show that by recasting black-box optimisation as a learning problem, the same abstraction may be re-employed; thereby taking steps toward unifying the clonal selection principle and distinguishing it from natural selection.
Resumo:
Image processing offers unparalleled potential for traffic monitoring and control. For many years engineers have attempted to perfect the art of automatic data abstraction from sequences of video images. This paper outlines a research project undertaken at Napier University by the authors in the field of image processing for automatic traffic analysis. A software based system implementing TRIP algorithms to count cars and measure vehicle speed has been developed by members of the Transport Engineering Research Unit (TERU) at the University. The TRIP algorithm has been ported and evaluated on an IBM PC platform with a view to hardware implementation of the pre-processing routines required for vehicle detection. Results show that a software based traffic counting system is realisable for single window processing. Due to the high volume of data required to be processed for full frames or multiple lanes, system operations in real time are limited. Therefore specific hardware is required to be designed. The paper outlines a hardware design for implementation of inter-frame and background differencing, background updating and shadow removal techniques. Preliminary results showing the processing time and counting accuracy for the routines implemented in software are presented and a real time hardware pre-processing architecture is described.