Quantum critical scaling at a Bose-glass/superfluid transition: Theory and experiment for a model quantum magnet

In this paper we investigate the quantum phase transition from magnetic Bose Glass to magnetic Bose-Einstein condensation induced by amagnetic field in NiCl2 center dot 4SC(NH2)(2) (dichloro-tetrakis-thiourea-nickel, or DTN), doped with Br (Br-DTN) or site diluted. Quantum Monte Carlo simulations for the quantum phase transition of the model Hamiltonian for Br-DTN, as well as for site-diluted DTN, are consistent with conventional scaling at the quantum critical point and with a critical exponent z verifying the prediction z = d; moreover the correlation length exponent is found to be nu = 0.75(10), and the order parameter exponent to be beta = 0.95(10). We investigate the low-temperature thermodynamics at the quantum critical field of Br-DTN both numerically and experimentally, and extract the power-law behavior of the magnetization and of the specific heat. Our results for the exponents of the power laws, as well as previous results for the scaling of the critical temperature to magnetic ordering with the applied field, are incompatible with the conventional crossover-scaling Ansatz proposed by Fisher et al. [Phys. Rev. B 40, 546 (1989)]. However they can all be reconciled within a phenomenological Ansatz in the presence of a dangerously irrelevant operator.

LALP: a language to program custom FPGA-based acceleration engines

Field-Programmable Gate Arrays (FPGAs) are becoming increasingly important in embedded and high-performance computing systems. They allow performance levels close to the ones obtained with Application-Specific Integrated Circuits, while still keeping design and implementation flexibility. However, to efficiently program FPGAs, one needs the expertise of hardware developers in order to master hardware description languages (HDLs) such as VHDL or Verilog. Attempts to furnish a high-level compilation flow (e.g., from C programs) still have to address open issues before broader efficient results can be obtained. Bearing in mind an FPGA available resources, it has been developed LALP (Language for Aggressive Loop Pipelining), a novel language to program FPGA-based accelerators, and its compilation framework, including mapping capabilities. The main ideas behind LALP are to provide a higher abstraction level than HDLs, to exploit the intrinsic parallelism of hardware resources, and to allow the programmer to control execution stages whenever the compiler techniques are unable to generate efficient implementations. Those features are particularly useful to implement loop pipelining, a well regarded technique used to accelerate computations in several application domains. This paper describes LALP, and shows how it can be used to achieve high-performance computing solutions.