Ensino de Arquitetura e Urbanismo com auxilio de ferramentas digitais

Este texto pretende discutir a importância do desenho à mão livre no processo projetivo arquitetônico inserido no contexto da era digital, por meio do uso das mesas digitais, comumente chamadas de tablets. A relevância desta discussão consiste em identificar como os desenhos feitos com tablets mantêm a percepção e o traço individual de cada pessoa. Pretende-se, com isto, não apenas rever e atualizar as disciplinas de desenho nos cursos de arquitetura, suas práticas e seus procedimentos, mas também, discutir o papel da linguagem e representação – analógica ou digital – e sua integração com outras disciplinas. São apresentadas algumas considerações sobre o uso dessa ferramenta nas seguintes disciplinas: História da Arquitetura e Urbanismo, Paisagismo e Projeto, ministradas no Instituto de Arquitetura e Urbanismo da Universidade de São Paulo, Brasil. As tablets são apresentadas como um meio de conexão entre o projeto analógico e digital, capazes de capturar a pressão e a velocidade do traço, aproximando a potencialidade e racionalidade do processo feito no computador com o gesto criativo do desenho à mão livre, resultando em uma sinergia entre essas duas linguagens.

Matrix-vector multiplication and triangular linear solver using GPGPU for symmetric positive definite matrices derived from elliptic equations

The modern GPUs are well suited for intensive computational tasks and massive parallel computation. Sparse matrix multiplication and linear triangular solver are the most important and heavily used kernels in scientific computation, and several challenges in developing a high performance kernel with the two modules is investigated. The main interest it to solve linear systems derived from the elliptic equations with triangular elements. The resulting linear system has a symmetric positive definite matrix. The sparse matrix is stored in the compressed sparse row (CSR) format. It is proposed a CUDA algorithm to execute the matrix vector multiplication using directly the CSR format. A dependence tree algorithm is used to determine which variables the linear triangular solver can determine in parallel. To increase the number of the parallel threads, a coloring graph algorithm is implemented to reorder the mesh numbering in a pre-processing phase. The proposed method is compared with parallel and serial available libraries. The results show that the proposed method improves the computation cost of the matrix vector multiplication. The pre-processing associated with the triangular solver needs to be executed just once in the proposed method. The conjugate gradient method was implemented and showed similar convergence rate for all the compared methods. The proposed method showed significant smaller execution time.

Parallel Layout Construction Algorithm for Irregular Shape Packing Problems

Cutting and packing problems arise in a variety of industries, including garment, wood and shipbuilding. Irregular shape packing is a special case which admits irregular items and is much more complex due to the geometry of items. In order to ensure that items do not overlap and no item from the layout protrudes from the container, the collision free region concept was adopted. It represents all possible translations for a new item to be inserted into a container with already placed items. To construct a feasible layout, collision free region for each item is determined through a sequence of Boolean operations over polygons. In order to improve the speed of the algorithm, a parallel version of the layout construction was proposed and it was applied to a simulated annealing algorithm used to solve bin packing problems. Tests were performed in order to determine the speed improvement of the parallel version over the serial algorithm

A complete CMOS UWB timed-array transmitter with a 3D Vivaldi antenna array for electronic high-resolution beam spatial scanning

We present a new Ultra Wide Band (UWB) Timed- Array Transmitter System with Beamforming capability for high-resolution remote acquisition of vital signals. The system consists of four identical channels, where each is formed of a serial topology with three modules: programmable delay circuit (PDC or τ), a novel UWB 5th Gaussian Derivative order pulse generator circuit (PG), and a planar Vivaldi antenna. The circuit was designed using 0.18μm CMOS standard process and the planar antenna array was designed with filmconductor on Rogers RO3206 substrate. Spice simulations results showed the pulse generation with 104 mVpp amplitude and 500 ps width. The power consumption is 543 μW, and energy consumption 0.27 pJ per pulse using a 2V power supply at a pulse repetition rate (PRR) of 100 MHz. Electromagnetic simulations results, using CST Microwave (MW) Studio 2011, showed the main lobe radiation with a gain maximum of 13.2 dB, 35.5º x 36.7º angular width, and a beam steering between 17º and -11º for azimuthal (θ) angles and 17º and -18º for elevation (φ) angles at the center frequency of 6 GHz