Power Factor Corrector Design applied to an 85-kHz Wireless Charger

Wireless charging technology extends the battery autonomy by allowing more flexible and practical ways of recharging it even when the electric vehicle is on move. The frequency conversion, which is required to generate a kHz-ranged magnetic field, also leads to considerable harmonics. As a result, the power factor and the corresponding efficiency decrement. This paper proposes a Power Factor Corrector which overcomes this drawback. The most relevant feature of the designed Power Factor Corrector is that it does not need any electrical signal from the secondary side to adjust its operation properly. The simulation results show the ability of the proposed scheme to increment the system efficiency for different State-Of-Charge in the Battery.

Energy Efficiency of Software Transactional Memory in a Heterogeneous Architecture

Hardware vendors make an important effort creating low-power CPUs that keep battery duration and durability above acceptable levels. In order to achieve this goal and provide good performance-energy for a wide variety of applications, ARM designed the big.LITTLE architecture. This heterogeneous multi-core architecture features two different types of cores: big cores oriented to performance and little cores, slower and aimed to save energy consumption. As all the cores have access to the same memory, multi-threaded applications must resort to some mutual exclusion mechanism to coordinate the access to shared data by the concurrent threads. Transactional Memory (TM) represents an optimistic approach for shared-memory synchronization. To take full advantage of the features offered by software TM, but also benefit from the characteristics of the heterogeneous big.LITTLE architectures, our focus is to propose TM solutions that take into account the power/performance requirements of the application and what it is offered by the architecture. In order to understand the current state-of-the-art and obtain useful information for future power-aware software TM solutions, we have performed an analysis of a popular TM library running on top of an ARM big.LITTLE processor. Experiments show, in general, better scalability for the LITTLE cores for most of the applications except for one, which requires the computing performance that the big cores offer.