Oblique-Shock-Wave/Boundary-Layer Interaction Using Near-Wall Reynolds-Stress Models

A synthesis is presented of the predictive capability of a family of near-wall wall-normal free Reynolds stress models (which are completely independent of wall topology, i.e., of the distance fromthe wall and the normal-to-thewall orientation) for oblique-shock-wave/turbulent-boundary-layer interactions. For the purpose of comparison, results are also presented using a standard low turbulence Reynolds number k–ε closure and a Reynolds stress model that uses geometric wall normals and wall distances. Studied shock-wave Mach numbers are in the range MSW = 2.85–2.9 and incoming boundary-layer-thickness Reynolds numbers are in the range Reδ0 = 1–2×106. Computations were carefully checked for grid convergence. Comparison with measurements shows satisfactory agreement, improving on results obtained using a k–ε model, and highlights the relative importance of redistribution and diffusion closures, indicating directions for future modeling work.

Quantitative assessment of fault tolerant precision timing for electricity substations

Advanced substation applications, such as synchrophasors and IEC 61850-9-2 sampled value process buses, depend upon highly accurate synchronizing signals for correct operation. The IEEE 1588 Precision Timing Protocol (PTP) is the recommended means of providing precise timing for future substations. This paper presents a quantitative assessment of PTP reliability using Fault Tree Analysis. Two network topologies are proposed that use grandmaster clocks with dual network connections and take advantage of the Best Master Clock Algorithm (BMCA) from IEEE 1588. The cross-connected grandmaster topology doubles reliability, and the addition of a shared third grandmaster gives a nine-fold improvement over duplicated grandmasters. The performance of BMCA mediated handover of the grandmaster role during contingencies in the timing system was evaluated experimentally. The 1 µs performance requirement of sampled values and synchrophasors are met, even during network or GPS antenna outages. Slave clocks are shown to synchronize to the backup grandmaster in response to degraded performance or loss of the main grandmaster. Slave disturbances are less than 350 ns provided the grandmaster reference clocks are not offset from one another. A clear understanding of PTP reliability and the factors that affect availability will encourage the adoption of PTP for substation time synchronization.

A framework for automated identification of attack scenarios on IT infrastructures

Due to increased complexity, scale, and functionality of information and telecommunication (IT) infrastructures, every day new exploits and vulnerabilities are discovered. These vulnerabilities are most of the time used by ma¬licious people to penetrate these IT infrastructures for mainly disrupting business or stealing intellectual pro¬perties. Current incidents prove that it is not sufficient anymore to perform manual security tests of the IT infra¬structure based on sporadic security audits. Instead net¬works should be continuously tested against possible attacks. In this paper we present current results and challenges towards realizing automated and scalable solutions to identify possible attack scenarios in an IT in¬frastructure. Namely, we define an extensible frame¬work which uses public vulnerability databases to identify pro¬bable multi-step attacks in an IT infrastructure, and pro¬vide recommendations in the form of patching strategies, topology changes, and configuration updates.

Maximal structuring of acyclic process models

This article addresses the transformation of a process model with an arbitrary topology into an equivalent structured process model. In particular, this article studies the subclass of process models that have no equivalent well-structured representation but which, nevertheless, can be partially structured into their maximally-structured representation. The transformations are performed under a behavioral equivalence notion that preserves the observed concurrency of tasks in equivalent process models. The article gives a full characterization of the subclass of acyclic process models that have no equivalent well-structured representation, but do have an equivalent maximally-structured one, as well as proposes a complete structuring method. Together with our previous results, this article completes the solution of the process model structuring problem for the class of acyclic process models.

Expander graph based key distribution mechanisms in wireless sensor networks

Secure communications between large number of sensor nodes that are randomly scattered over a hostile territory, necessitate efficient key distribution schemes. However, due to limited resources at sensor nodes such schemes cannot be based on post deployment computations. Instead, pairwise (symmetric) keys are required to be pre-distributed by assigning a list of keys, (a.k.a. key-chain), to each sensor node. If a pair of nodes does not have a common key after deployment then they must find a key-path with secured links. The objective is to minimize the keychain size while (i) maximizing pairwise key sharing probability and resilience, and (ii) minimizing average key-path length. This paper presents a deterministic key distribution scheme based on Expander Graphs. It shows how to map the parameters (e.g., degree, expansion, and diameter) of a Ramanujan Expander Graph to the desired properties of a key distribution scheme for a physical network topology.

A high frequency current source converter with adjustable magnitude to drive high power piezoelectric transducers

A general electrical model of a piezoelectric transducer for ultrasound applications consists of a capacitor in parallel with RLC legs. A high power voltage source converter can however generate significant voltage stress across the transducer that creates high leakage currents. One solution is to reduce the voltage stress across the piezoelectric transducer by using an LC filter, however a main drawback is changing the piezoelectric resonant frequency and its characteristics. Thereby it reduces the efficiency of energy conversion through the transducer. This paper proposes that a high frequency current source converter is a suitable topology to drive high power piezoelectric transducers efficiently.

A wide area monitoring system based load restoration method

Restoring a large-scale power system has always been a complicated and important issue. A lot of research work has been done on different aspects of the whole power system restoration procedure. However, more time will be required to complete the power system restoration process in an actual situation if accurate and real-time system data cannot be obtained. With the development of the wide area monitoring system (WAMS), power system operators are capable of accessing to more accurate data in the restoration stage after a major outage. The ultimate goal of the system restoration is to restore as much load as possible while in the shortest period of time after a blackout, and the restorable load can be estimated by employing WAMS. Moreover, discrete restorable loads are employed considering the limited number of circuit-breaker operations and the practical topology of distribution systems. In this work, a restorable load estimation method is proposed employing WAMS data after the network frame has been reenergized, and WAMS is also employed to monitor the system parameters in case the newly recovered system becomes unstable again. The proposed method has been validated with the New England 39-Bus system and an actual power system in Guangzhou, China.

Cascaded DC-DC converter connection of photovoltaic modules

New residential scale photovoltaic (PV) arrays are commonly connected to the grid by a single dc-ac inverter connected to a series string of pv panels, or many small dc-ac inverters which connect one or two panels directly to the ac grid. This paper proposes an alternative topology of nonisolated per-panel dc-dc converters connected in series to create a high voltage string connected to a simplified dc-ac inverter. This offers the advantages of a "converter-per-panel" approach without the cost or efficiency penalties of individual dc-ac grid connected inverters. Buck, boost, buck-boost, and Cu´k converters are considered as possible dc-dc converters that can be cascaded. Matlab simulations are used to compare the efficiency of each topology as well as evaluating the benefits of increasing cost and complexity. The buck and then boost converters are shown to be the most efficient topologies for a given cost, with the buck best suited for long strings and the boost for short strings. While flexible in voltage ranges, buck-boost, and Cu´k converters are always at an efficiency or alternatively cost disadvantage.

A class B switch-mode assisted linear amplifier

A switch-mode assisted linear amplifier (SMALA) combining a linear (Class B) and a switch-mode (Class D) amplifier is presented. The usual single hysteretic controlled half-bridge current dumping stage is replaced by two parallel buck converter stages, in a parallel voltage controlled topology. These operate independently: one buck converter sources current to assist the upper Class B output device, and a complementary converter sinks current to assist the lower device. This topology lends itself to a novel control approach of a dead-band at low power levels where neither class D amplifier assists, allowing the class B amplifier to supply the load without interference, ensuring high fidelity. A 20 W implementation demonstrates 85% efficiency, with distortion below 0.08% measured across the full audio bandwidth at 15 W. The class D amplifier begins assisting at 2 W, and below this value, the distortion was below 0.03%. Complete circuitry is given, showing the simplicity of the additional class D amplifier and its corresponding control circuitry.

A class E resonant inverter for use as electronic fluorescent lamp ballast

Class E Resonant Inverters are theoretically capable of delivering any power to a load and achieve 100% efficiency at any frequency of operation. In practice efficiency in the “high 90's” can be achieved into megahertz frequencies regardless of inverter output powers. The topology also allows the manipulation of output power through sub-optimal operation, with a negligible efficiency penalty. The 24W inverter discussed in this paper was specifically designed to harness the benefits, and discuss the shortcomings, of the Class E topology for use in the growing market for portable, battery powered lighting. It exhibits a peak recorded power efficiently of over 98%, and a conservatively measured efficiency of 95% across a range of dimming settings.

High frequency high power converters for industrial applications

The main contribution of this project was to investigate power electronics technology in designing and developing high frequency high power converters for industrial applications. Therefore, the research was conducted at two levels; first at system level which mainly encapsulated the circuit topology and control scheme and second at application level which involves with real-world applications. Pursuing these objectives, varied topologies have been developed and proposed within this research. The main aim was to resolving solid-state switches limited power rating and operating speed while increasing the system flexibility considering the application characteristics. The developed new power converter configurations were applied to pulsed power and high power ultrasound applications for experimental validation.

Hysteretic multilevel NPC converter control for a Switch Mode Assisted Linear Amplifier

A Switch-Mode Assisted Linear Amplifier (SMALA) combines the high quality of a linear amplifier required for audio applications with the high efficiency of a switch-mode amplifier. The careful choice of current sense point and switch placement allows a simple non-isolated hysteresis current controller for the switch-mode section. This paper explains the extension of the hysteresis current controller for the control of a three level Neutral Point Clamped (NPC) converter, with simulations as proof of concept. The NPC topology allows the use of lower voltage switches and lower switching frequencies to implement high power audio amplifiers using the SMALA topology.

PV string per-module maximum power point enabling converters

Many grid connected PV installations consist of a single series string of PV modules and a single DC-AC inverter. This efficiency of this topology can be enhanced with additional low power, low cost per panel converter modules. Most current flows directly in the series string which ensures high efficiency. However parallel Cúk or buck-boost DC-DC converters connected across each adjacent pair of modules now support any desired current difference between series connected PV modules. Each converter “shuffles” the desired difference in PV module currents between two modules and so on up the string. Spice simulations show that even with poor efficiency, these modules can make a significant improvement to the overall power which can be recovered from partially shaded PV strings.

Cascaded DC-DC converter connection of photovoltaic modules

New residential scale photovoltaic (PV) arrays are commonly connected to the grid by a single DC-AC inverter connected to a series string of PV modules, or many small DC-AC inverters which connect one or two modules directly to the AC grid. This paper shows that a "converter-per-module" approach offers many advantages including individual module maximum power point tracking, which gives great flexibility in module layout, replacement, and insensitivity to shading; better protection of PV sources, and redundancy in the case of source or converter failure; easier and safer installation and maintenance; and better data gathering. Simple nonisolated per-module DC-DC converters can be series connected to create a high voltage string connected to a simplified DC-AC inverter. These advantages are available without the cost or efficiency penalties of individual DC-AC grid connected inverters. Buck, boost, buck-boost and Cuk converters are possible cascadable converters. The boost converter is best if a significant step up is required, such as with a short string of 12 PV modules. A string of buck converters requires many more modules, but can always deliver any combination of module power. The buck converter is the most efficient topology for a given cost. While flexible in voltage ranges, buck-boost and Cuk converters are always at an efficiency or alternatively cost disadvantage

Design optimisation of ironless motors based on magnet selection

This paper considers the design of a radial flux permanent magnet iron less core brushless DC motor for use in an electric wheel drive with an integrated epicyclic gear reduction. The motor has been designed for a continuous output torque of 30 Nm and peak rating of 60 Nm with a maximum operating speed of 7000 RPM. In the design of brushless DC motors with a toothed iron stator the peak air-gap magnetic flux density is typically chosen to be close to that of the remanence value of the magnets used. This paper demonstrates that for an ironless motor the optimal peak air-gap flux density is closer to the maximum energy product of the magnets used. The use of a radial flux topology allows for high frequency operation and can be shown to give high specific power output while maintaining a relatively low magnet mass. Two-dimensional finite element analysis is used to predict the air-gap flux density. The motor design is based around commonly available NdFeB bar magnet size