A restrike waveform predictive model for shunt capacitor bank switching with point-on-wave recommendation

Circuit-breakers (CBs) are subject to electrical stresses with restrikes during capacitor bank operation. Stresses are caused by the overvoltages across CBs, the interrupting currents and the rate of rise of recovery voltage (RRRV). Such electrical stresses also depend on the types of system grounding and the types of dielectric strength curves. The aim of this study is to demonstrate a restrike waveform predictive model for a SF6 CB that considered the types of system grounding: grounded and non-grounded and the computation accuracy comparison on the application of the cold withstand dielectric strength and the hot recovery dielectric strength curve including the POW (point-on-wave) recommendations to make an assessment of increasing the CB remaining life. The simulation of SF6 CB stresses in a typical 400 kV system was undertaken and the results in the applications are presented. The simulated restrike waveforms produced with the identified features using wavelet transform can be used for restrike diagnostic algorithm development with wavelet transform to locate a substation with breaker restrikes. This study found that the hot withstand dielectric strength curve has less magnitude than the cold withstand dielectric strength curve for restrike simulation results. Computation accuracy improved with the hot withstand dielectric strength and POW controlled switching can increase the life for a SF6 CB.

A novel CDVM based high-voltage converter using low power solid-state switches and a tuned resonant circuit designed for pulsed power applications

A novel concept of producing high dc voltage for pulsed-power applications is proposed in this paper. The topology consists of an LC resonant circuit supplied through a tuned alternating waveform that is produced by an inverter. The control scheme is based on the detection of variations in the resonant frequency and adjustment of the switching signal patterns for the inverter to produce a square waveform with exactly the same frequencies. Therefore the capacitor voltage oscillates divergently with an increasing amplitude. A simple one-stage capacitor-diode voltage multiplier (CDVM) connected to the resonant capacitor then rectifies the alternating voltage and gives a dc level equal to twice the input voltage amplitude. The produced high voltage appears then in the form of high-voltage pulses across the load. A basic model is simulated by Simulink platform of MATLAB and the results are included in the paper.

Harmonic elimination technique for a single-phase multilevel converter with unequal DC link voltage levels

Multilevel converters, because of the benefits they attract in generating high quality output voltage, are used in several applications. Various modulation and control techniques are introduced by several researchers to control the output voltage of the multilevel converters like space vector modulation and harmonic elimination (HE) methods. Multilevel converters may have a DC link with equal or unequal DC voltages. In this study a new HE technique based on the HE method is proposed for multilevel converters with unequal DC link voltage. The DC link voltage levels are considered as additional variables for the HE method and the voltage levels are defined based on the HE results. Increasing the number of voltage levels can reduce lower order harmonic content because of the fact that more variables are created. In comparison to previous methods, this new technique has a positive effect on the output voltage quality by reducing its total harmonic distortion, which must take into consideration for some applications such as uninterruptable power supply, motor drive systems and piezoelectric transducer excitation. In order to verify the proposed modulation technique, MATLAB simulations and experimental tests are carried out for a single-phase four-level diode-clamped converter.

Power electronic converters for high power ultrasound transducers

Piezoelectric transducers convert electrical energy to mechanical energy and play a great role in ultrasound systems. Ultrasound power transducer performance is strongly related to the applied electrical excitation. To have a suitable excitation for maximum energy conversion, it is required to analyze the effects of input signal waveform, medium and input signal distortion on the characteristic of a high power ultrasound system (including ultrasound transducer). In this research, different input voltage signals are generated using a single-phase power inverter and a linear power amplifier to excite a high power ultrasound transducer in different medium (water and oil) in order to study the characteristic of the system. We have also considered and analyzed the effect of power converter output voltage distortions on the performance of the high power ultrasound transducer using a passive filter.

Smart coordination of energy storage units (ESUs) for voltage and loading management in distribution networks

This paper proposes a distributed control approach to coordinate multiple energy storage units (ESUs) to avoid violation of voltage and thermal constraints, which are some of the main power quality challenges for future distribution networks. ESUs usually are connected to a network through voltage source converters. In this paper, both ESU converters active and reactive power are used to deal with the above mentioned power quality issues. ESUs' reactive power is proposed to be used for voltage support, while the active power is to be utilized in managing network loading. Two typical distribution networks are used to apply the proposed method, and the simulated results are illustrated in this paper to show the effectiveness of this approach.

Power converters design and analysis for high power piezoelectric ultrasonic transducers

High power piezoelectric ultrasonic transducers have been widely exploited in a variety of applications. The critical behaviour of a piezoelectric device is encapsulated in its resonant frequencies because of its maximum transmission performance at these frequencies. Therefore power electronic converters should be tuned at those resonant frequencies to transfer electrical power to mechanical power efficiently. However, structural and environmental changes cause variations in the device resonant frequencies which can degrade the system performance. Hence, estimating the device resonant frequencies within the incorporated setup can significantly improve the system performance. This paper proposes an efficient resonant frequency estimation approach to maintain the performance of high power ultrasonic applications using the employed power converter. Experimental validations indicate the effectiveness of the proposed method.

High frequency high power converters for industrial applications

The main contribution of this project was to investigate power electronics technology in designing and developing high frequency high power converters for industrial applications. Therefore, the research was conducted at two levels; first at system level which mainly encapsulated the circuit topology and control scheme and second at application level which involves with real-world applications. Pursuing these objectives, varied topologies have been developed and proposed within this research. The main aim was to resolving solid-state switches limited power rating and operating speed while increasing the system flexibility considering the application characteristics. The developed new power converter configurations were applied to pulsed power and high power ultrasound applications for experimental validation.

The effects of coupled inductors in parallel interleaved buck converters

Interleaved switching and coupled inductors are proven methods for reducing DC-DC converter output ripple. This paper furthers discussions of these techniques to arrangements of many buck converters connected in parallel. The different possible arrangements of the DC-DC converters are discussed and criteria for fair comparisons between them are chosen. The effects of interleaved switching on ripple values are presented and subsequent effects of coupling the inductors is then investigated. A generalised solution for current ripple in n coupled inductor converters is presented. Simulations are used to verify the solution and characterise the converter and output ripple for all configurations.

A method of extracting switching loss from a high efficiency MOSFET based half bridge converter

The measurement of losses in high efficiency / high power converters is difficult. Measuring the losses directly from the difference between the input and output power results in large errors. Calorimetric methods are usually used to bypass this issue but introduce different problems, such as, long measurement times, limited power loss measurement range and/or large set up cost. In this paper the total losses of a converter are measured directly and switching losses are exacted. The measurements can be taken with only three multimeters and a current probe and a standard bench power supply. After acquiring two or three power loss versus output current sweeps, a series of curve fitting processes are applied and the switching losses extracted.

Multi-converter topology evaluation for connection of low voltage DC sources

A design for a cascaded multilevel DC-DC converter is proposed. The applications of a multilevel converter and the design issues involved in changing from a single converter to multiple converters are discussed. Implementation of the multilevel system using multiple Cuk converters is suggested and explanations of design decisions are given. The merits of the proposed design are discussed.

Bandwidth considerations for multilevel converters

Multilevel converters can achieve an overall effective switch frequency multiplication and consequent ripple reduction through the cancellation of the lowest order switch frequency terms. This paper investigates the harmonic content and the frequency response of these multimodulator converters. It is shown that the transfer function of uniformly sampled modulators is a bessel function associated with the inherent sampling process. Naturally sampled modulators have a flat transfer function, but multiple switchings per switch cycle will occur unless the input is slew-rate limited. Lower sideband harmonics of the effective carrier frequency and, in uniform converters, harmonics of the input signal also limit the useful bandwidth. Observations about the effect of the number of converters, their type (naturally or uniformly sampled), and the ratio of modulating frequency and switch frequency are made

Voltage unbalance improvement in low voltage residential feeders with rooftop PVs using custom power devices

Voltage unbalance is a major power quality problem in low voltage residential feeders due to the random location and rating of single-phase rooftop photovoltaic cells (PV). In this paper, two different improvement methods based on the application of series (DVR) and parallel (DSTATCOM) custom power devices are investigated to improve the voltage unbalance problem in these feeders. First, based on the load flow analysis carried out in MATLAB, the effectiveness of these two custom power devices is studied vis-à-vis the voltage unbalance reduction in urban and semi-urban/rural feeders containing rooftop PVs. Their effectiveness is studied from the installation location and rating points of view. Later, a Monte Carlo based stochastic analysis is carried out to investigate their efficacy for different uncertainties of load and PV rating and location in the network. After the numerical analyses, a converter topology and control algorithm is proposed for the DSTATCOM and DVR for balancing the network voltage at their point of common coupling. A state feedback control, based on pole-shift technique, is developed to regulate the voltage in the output of the DSTATCOM and DVR converters such that the voltage balancing is achieved in the network. The dynamic feasibility of voltage unbalance and profile improvement in LV feeders, by the proposed structure and control algorithm for the DSTATCOM and DVR, is verified through detailed PSCAD/EMTDC simulations.

Primary control level of parallel distributed energy resources converters in system of multiple interconnected autonomous microgrids within self-healing networks

To minimise the number of load sheddings in a microgrid (MG) during autonomous operation, islanded neighbour MGs can be interconnected if they are on a self-healing network and an extra generation capacity is available in the distributed energy resources (DER) of one of the MGs. In this way, the total load in the system of interconnected MGs can be shared by all the DERs within those MGs. However, for this purpose, carefully designed self-healing and supply restoration control algorithm, protection systems and communication infrastructure are required at the network and MG levels. In this study, first, a hierarchical control structure is discussed for interconnecting the neighbour autonomous MGs where the introduced primary control level is the main focus of this study. Through the developed primary control level, this study demonstrates how the parallel DERs in the system of multiple interconnected autonomous MGs can properly share the load of the system. This controller is designed such that the converter-interfaced DERs operate in a voltage-controlled mode following a decentralised power sharing algorithm based on droop control. DER converters are controlled based on a per-phase technique instead of a conventional direct-quadratic transformation technique. In addition, linear quadratic regulator-based state feedback controllers, which are more stable than conventional proportional integrator controllers, are utilised to prevent instability and weak dynamic performances of the DERs when autonomous MGs are interconnected. The efficacy of the primary control level of the DERs in the system of multiple interconnected autonomous MGs is validated through the PSCAD/EMTDC simulations considering detailed dynamic models of DERs and converters.

Interconnected autonomous microgrids in smart grids with self-healing

In order to minimize the number of load shedding in a Microgrid during autonomous operation, islanded neighbour microgrids can be interconnected if they are on a self-healing network and an extra generation capacity is available in Distributed Energy Resources (DER) in one of the microgrids. In this way, the total load in the system of interconnected microgrids can be shared by all the DERs within these microgrids. However, for this purpose, carefully designed self-healing and supply restoration control algorithm, protection systems and communication infrastructure are required at the network and microgrid levels. In this chapter, first a hierarchical control structure is discussed for interconnecting the neighbour autonomous microgrids where the introduced primary control level is the main focus. Through the developed primary control level, it demonstrates how the parallel DERs in the system of multiple interconnected autonomous microgrids can properly share the load in the system. This controller is designed such that the converter-interfaced DERs operate in a voltage-controlled mode following a decentralized power sharing algorithm based on droop control. The switching in the converters is controlled using a linear quadratic regulator based state feedback which is more stable than conventional proportional integrator controllers and this prevents instability among parallel DERs when two microgrids are interconnected. The efficacy of the primary control level of DERs in the system of multiple interconnected autonomous microgrids is validated through simulations considering detailed dynamic models of DERs and converters.

Performance evaluation of three-level Z-source inverters under semiconductor-failure conditions

This paper evaluates and proposes various compensation methods for three-level Z-source inverters under semiconductor-failure conditions. Unlike the fault-tolerant techniques used in traditional three-level inverters, where either an extra phase-leg or collective switching states are used, the proposed methods for three-level Z-source inverters simply reconfigure their relevant gating signals so as to ride-through the failed semiconductor conditions smoothly without any significant decrease in their ac-output quality and amplitude. These features are partly attributed to the inherent boost characteristics of a Z-source inverter, in addition to its usual voltage-buck operation. By focusing on specific types of three-level Z-source inverters, it can also be shown that, for the dual Z-source inverters, a unique feature accompanying it is its extra ability to force common-mode voltage to zero even under semiconductor-failure conditions. For verifying these described performance features, PLECS simulation and experimental testing were performed with some results captured and shown in a later section for visual confirmation.