“We have to work within the system!”: Staff perceptions of organizational barriers to decision making for older adults with dementia in Australian aged care facilities

The current study explored the perceptions of direct care staff working in Australian residential aged care facilities (RACFs) regarding the organizational barriers that they believe prevent them from facilitating decision making for individuals with dementia. Normalization process theory (NPT) was used to interpret the findings to understand these barriers in a broader context. The qualitative study involved semi-structured interviews (N = 41) and focus groups (N = 8) with 80 direct care staff members of all levels working in Australian RACFs. Data collection and analysis were conducted in parallel and followed a systematic, inductive approach in line with grounded theory. The perceptions of participants regarding the organizational barriers to facilitating decision making for individuals with dementia can be described by the core category, Working Within the System, and three sub-themes: (a) finding time, (b) competing rights, and (c)not knowing. Examining the views of direct care staff through the lens of NPT allows possible areas for improvement to be identified at an organizational level and the perceived barriers to be understood in the context of promoting normalization of decision making for individuals with dementia.

System-level analysis of network interfaces for hierarchical MPSoCs

Network Interfaces (NIs) are used in Multiprocessor System-on-Chips (MPSoCs) to connect CPUs to a packet switched Network-on-Chip. In this work we introduce a new NI architecture for our hierarchical CoreVA-MPSoC. The CoreVA-MPSoC targets streaming applications in embedded systems. The main contribution of this paper is a system-level analysis of different NI configurations, considering both software and hardware costs for NoC communication. Different configurations of the NI are compared using a benchmark suite of 10 streaming applications. The best performing NI configuration shows an average speedup of 20 for a CoreVA-MPSoC with 32 CPUs compared to a single CPU. Furthermore, we present physical implementation results using a 28 nm FD-SOI standard cell technology. A hierarchical MPSoC with 8 CPU clusters and 4 CPUs in each cluster running at 800MHz requires an area of 4.56mm2.