Microphone array shape calibration in diffuse noise fields

This correspondence presents a microphone array shape calibration procedure for diffuse noise environments. The procedure estimates intermicrophone distances by fitting the measured noise coherence with its theoretical model and then estimates the array geometry using classical multidimensional scaling. The technique is validated on noise recordings from two office environments.

Sensitivity analysis of voltage imbalance in distribution networks with rooftop PVs

A comprehensive voltage imbalance sensitivity analysis and stochastic evaluation based on the rating and location of single-phase grid-connected rooftop photovoltaic cells (PVs) in a residential low voltage distribution network are presented. The voltage imbalance at different locations along a feeder is investigated. In addition, the sensitivity analysis is performed for voltage imbalance in one feeder when PVs are installed in other feeders of the network. A stochastic evaluation based on Monte Carlo method is carried out to investigate the risk index of the non-standard voltage imbalance in the network in the presence of PVs. The network voltage imbalance characteristic based on different criteria of PV rating and location and network conditions is generalized. Improvement methods are proposed for voltage imbalance reduction and their efficacy is verified by comparing their risk index using Monte Carlo simulations.

Cross voltage control with inner hysteresis current control for multi-output boost converter

Multi-output boost (MOB) converter is a novel DC-DC converter unlike the regular boost converter, has the ability to share its total output voltage and to have different series output voltage from a given duty cycle for low and high power applications. In this paper, discrete voltage control with inner hysteresis current control loop has been proposed to keep the simplicity of the control law for the double-output MOB converter, which can be implemented by a combination of analogue and logical ICs or simple microcontroller to constrain the output voltages of MOB converter at their reference voltages against variation in load or input voltage. The salient features of the proposed control strategy are simplicity of implementation and ease to extend to multiple outputs in the MOB converter. Simulation and experimental results are presented to show the validity of control strategy.

Asymmetrical DC link voltage configuration for a diode-clamped inverter

There is a trade off between a number of output voltage levels and the reliability and efficiency of a multilevel converter. A new configuration of diode-clamped multilevel inverters with a different combination of DC link capacitors voltage has been proposed in this paper. Two different symmetrical and asymmetrical unequal arrangements for a four-level diode-clamped inverter have been compared, in order to find an optimum arrangement with lower switching losses and optimised output voltage quality. The simulation and hardware results for a four-level inverter show that the asymmetrical configuration can obtain more output voltage levels with the same number of components compared with a conventional four-level inverter and this will lead to the reduction of the harmonic content of the output voltage. A new family of multi-output DC-DC converters with a simple control strategy has been utilised as a front-end converter to supply the DC link capacitor voltages for the optimised configuration.

A high voltage power converter with a frequency and voltage controller

A high voltage power converter is presented in this paper and is based on a Capacitor-Diode Voltage Multiplier (CDVM) supplied through an inverter. This power converter has the capabilities of generating variable high DC voltage with improved transient response. The simulation results which are presented in this paper verify that due to its fast transient response, this converter can be used as a high DC voltage source in many applications.

Investigation of shaft voltage in wind turbine systems with induction generators

This paper presents the analysis of shaft voltage in different configurations of a doubly fed induction generator (DFIG) and an induction generator (IG) with a back-to-back inverter in wind turbine applications. Detailed high frequency model of the proposed systems have been developed based on existing capacitive couplings in IG & DFIG structures and common mode voltage sources. In this research work, several arrangements of DFIG based wind energy conversion systems (WES) are investigated in case of shaft voltage calculation and its mitigation techniques. Placements of an LC line filter in different locations and its effects on shaft voltage elimination are studied via Mathematical analysis and simulations. A pulse width modulation (PWM) technique and a back-to-back inverter with a bidirectional buck converter have been presented to eliminate the shaft voltage in a DFIG wind turbine.

Different approaches to reduce shaft voltage in AC generators

This paper presents several shaft voltage reduction techniques for doubly-fed induction generators in wind turbine applications. These techniques includes: pulse width modulated voltage without zero vectors, multi-level inverters with proper PWM strategy, better generator design to minimize effective capacitive couplings in shaft voltage, active common-mode filter, reducing dc-link voltage and increasing modulation index. These methods have been verified with mathematical analysis and simulations.

Calculations of capacitive couplings in induction generators to analyse shaft voltage

This paper deals with the analysis of the parameters which are effective in shaft voltage generation of induction generators. It focuses on different parasitic capacitive couplings by mathematical equations, finite element simulations and experiments. The effects of different design parameters have been studied on proposed capacitances and resultant shaft voltage. Some parameters can change proposed capacitive coupling such as: stator slot tooth, the gap between slot tooth and winding, and the height of the slot tooth, as well as the air gap between the rotor and the stator. This analysis can be used in a primary stage of a generator design to reduce motor shaft voltage and avoid additional costs of resultant bearing current mitigation.

A bidirectional two-leg resonant converter for high voltage pulsed power application

A high voltage pulsed power supply is proposed in this paper based on oscillation between an inductor and a capacitor in an LC circuit. A two-leg resonant circuit, supplied through an inverter with an alternative voltage waveform, can generate output voltage up to four times an input voltage magnitude. Bipolar and unipolar modulations are used in a single phase inverter to analyse their effects on the proposed resonant converter. Simulations have been carried out to evaluate the proposed topology and control.

A novel high voltage pulsed power supply based on low voltage switch-capacitor units

This paper presents a high voltage pulsed power system based on low voltage switch-capacitor units connected to a current source for several applications such as plasma systems. A buck-boost converter topology is used to utilize the current source and a series of low voltage switch-capacitor units is connected to the current source in order to provide high voltage with high voltage stress (dv/dt) as demanded by loads. This pulsed power converter is flexible in terms of energy control, in that the stored energy in the current source can be adjusted by changing the current magnitude to significantly improve the efficiency of various systems with different requirements. Output voltage magnitude and stress (dv/dt) can be controlled by a proper selection of components and control algorithm to turn on and off switching devices.

A general approach to control a positive buck-boost converter to achieve robustness against input voltage fluctuations and load changes

A Positive Buck-Boost converter is a known DC-DC converter which may be controlled to act as Buck or Boost converter with same polarity of the input voltage. This converter has four switching states which include all the switching states of the above mentioned DC-DC converters. In addition there is one switching state which provides a degree of freedom for the positive Buck-Boost converter in comparison to the Buck, Boost, and inverting Buck-Boost converters. In other words the Positive Buck-Boost Converter shows a higher level of flexibility for its inductor current control compared to the other DC-DC converters. In this paper this extra degree of freedom is utilised to increase the robustness against input voltage fluctuations and load changes. To address this capacity of the positive Buck-Boost converter, two different control strategies are proposed which control the inductor current and output voltage against any fluctuations in input voltage and load changes. Mathematical analysis for dynamic and steady state conditions are presented in this paper and simulation results verify the proposed method.

Multi-output buck-boost converter with enhanced dynamic response to load and input voltage changes

This paper presents a new multi-output DC/DC converter topology that has step-up and step-down conversion capabilities. In this topology, several output voltages can be generated which can be used in different applications such as multilevel converters with diode-clamped topology or power supplies with several voltage levels. Steady state and dynamic equations of the proposed multi-output converter have been developed, that can be used for steady state and transient analysis. Two control techniques have been proposed for this topology based on constant and dynamic hysteresis band height control to address different applications. Simulations have been performed for different operating modes and load conditions to verify the proposed topology and its control technique. Additionally, a laboratory prototype is designed and implemented to verify the simulation results.

Flying-capacitor-based chopper circuit for DC capacitor voltage balancing in diode-clamped multilevel inverter

This paper proposes a flying-capacitor-based chopper circuit for dc capacitor voltage equalization in diode-clamped multilevel inverters. Its important features are reduced voltage stress across the chopper switches, possible reduction in the chopper switching frequency, improved reliability, and ride-through capability enhancement. This topology is analyzed using three- and four-level flying-capacitor-based chopper circuit configurations. These configurations are different in capacitor and semiconductor device count and correspondingly reduce the device voltage stresses by half and one-third, respectively. The detailed working principles and control schemes for these circuits are presented. It is shown that, by preferentially selecting the available chopper switch states, the dc-link capacitor voltages can be efficiently equalized in addition to having tightly regulated flying-capacitor voltages around their references. The various operating modes of the chopper are described along with their preferential selection logic to achieve the desired performances. The performance of the proposed chopper and corresponding control schemes are confirmed through both simulation and experimental investigations.

The effect of dialect mismatch on likelihood-maximising speech enhancement for noise-robust speech recognition

Traditional speech enhancement methods optimise signal-level criteria such as signal-to-noise ratio, but these approaches are sub-optimal for noise-robust speech recognition. Likelihood-maximising (LIMA) frameworks are an alternative that optimise parameters of enhancement algorithms based on state sequences generated for utterances with known transcriptions. Previous reports of LIMA frameworks have shown significant promise for improving speech recognition accuracies under additive background noise for a range of speech enhancement techniques. In this paper we discuss the drawbacks of the LIMA approach when multiple layers of acoustic mismatch are present – namely background noise and speaker accent. Experimentation using LIMA-based Mel-filterbank noise subtraction on American and Australian English in-car speech databases supports this discussion, demonstrating that inferior speech recognition performance occurs when a second layer of mismatch is seen during evaluation.