382 resultados para native defect level


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This paper describes a diode-clamped three-level inverter-based battery/supercapacitor direct integration scheme for renewable energy systems. The study is carried out for three different cases. In the first case, one of the two dc-link capacitors of the inverter is replaced by a battery bank and the other by a supercapacitor bank. In the second case, dc-link capacitors are replaced by two battery banks. In the third case, ordinary dc-link capacitors are replaced by two supercapacitor banks. The first system is supposed to mitigate both long-term and short-term power fluctuations while the last two systems are intended for smoothening long-term and short-term power fluctuations, respectively. These topologies eliminate the need for interfacing dc-dc converters and thus considerably improve the overall system efficiency. The major issue in aforementioned systems is the unavoidable imbalance in dc-link voltages. An analysis on the effects of unbalance and a space vector modulation method, which can produce undistorted current even in the presence of such unbalances, are presented in this paper. Furthermore, small vector selection-based power sharing and state of charge balancing techniques are proposed. Experimental results, obtained from a laboratory prototype, are presented to verify the efficacy of the proposed modulation and control techniques.

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This study proposes a five-level Z-source diode-clamped inverter designed with two intermediate Z-source networks connected between the dc input sources and rear-end inverter circuitry. By partially shorting the Z-source networks, new operating states not previously reported for two-level Z-source inverter are introduced here for operating the proposed inverter with voltage buck-boost energy conversion ability and five-level phase voltage switching. These characteristic features are in fact always ensured at the inverter terminal output by simply adopting a properly designed carrier modulation scheme, which always inserts two partial shoot-through states per half carrier cycle for smooth balanced operation. Theoretical findings and practical issues identified are eventually verified by constructing a scaled down laboratory prototype for testing.

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This paper presents new five-level current-source inverters (CSIs) with voltage/current buck-boost capability, unlike existing five-level CSIs where only voltage-boost operation is supported. The proposed inverters attain self-inductive-current-balancing per switching cycle at their dc front ends without having to include additional balancing hardware or complex control manipulation. The inverters can conveniently be controlled by using the well-established phase-shifted carrier modulation scheme with only two additional linear references and a mapping logic table needed. Existing modulators can therefore be conveniently retrofitted for controlling the presented inverters. By appropriately coordinating the inverter gating signals, their implementations can be realized by using the least number of components without degrading performance. These enhanced features of the inverters have already been verified in simulation and experimentally using a scaled-down laboratory platform.

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MMP-2 (gelatinase A) has been associated with the invasive potential of many cancer cells both in vitro and in vivo. It is now becoming clear that the activation of this enzyme might be a key step in tumor invasion. This activation process has been shown to be a membrane-associated pathway inducible by various agents such as collagen type I, concanavalin A or TGF-β, but its physiological regulation is still largely unresolved. MT-MMP was recently discovered and described as a potential gelatinase-A activator. In the present study, we investigated the expression of MT-MMP (membrane-type metalloproteinase) in cervical cancer cells both in vitro and in vivo. Comparing several in vitro-transformed cervical cell lines, previously shown to display different invasive potentials, our results showed that the ability of cells to overexpress MT-MMP mRNA following ConA induction correlated with their ability to activate gelatinase A and with a highly invasive behavior. Moreover, using immunohistochemistry and in situ hybridization, we found a higher level of MT-MMP expression in invasive cervical carcinoma and lymphnode metastases compared to its expression in non-invasive CIN III lesions. Our in vivo observations also clearly demonstrated a cooperation between stromal and tumor cells for the production of MT-MMP. Taken together, our results clearly correlated high level MT-MMP expression with invasiveness, and thus suggested that MT-MMP might play a crucial role in cervical tumor invasion.

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Level crossing risk continues to be a significant safety concern for the security of rail operations around the world. Over the last decade or so, a third of railway related fatalities occurred as a direct result of collisions between road and rail vehicles in Australia. Importantly, nearly half of these collisions occurred at railway level crossings with no active protection, such as flashing lights or boom barriers. Current practice is to upgrade level crossings that have no active protection. However, the total number of level crossings found across Australia exceed 23,500, and targeting the proportion of these that are considered high risk (e.g. public crossings with passive controls) would cost in excess of AU$3.25 billion based on equipment, installation and commissioning costs of warning devices that are currently type approved. Level crossing warning devices that are low-cost provide a potentially effective control for reducing risk; however, over the last decade, there have been significant barriers and legal issues in both Australia and the US that have foreshadowed their adoption. These devices are designed to have significantly lower lifecycle costs compared with traditional warning devices. They often make use of use of alternative technologies for train detection, wireless connectivity and solar energy supply. This paper describes the barriers that have been encountered for the adoption of these devices in Australia, including the challenges associated with: (1) determining requisite safety levels for such devices; (2) legal issues relating to duty of care obligations of railway operators; and (3) issues of Tort liability around the use of less than fail-safe equipment. This paper provides an overview of a comprehensive safety justification that was developed as part of a project funded by a collaborative rail research initiative established by the Australian government, and describes the conceptual framework and processes being used to justify its adoption. The paper provides a summary of key points from peer review and discusses prospective barriers that may need to be overcome for future adoption. A successful outcome from this process would result in the development of a guideline for decision-making, providing a precedence for adopting low-cost level crossing warning devices in other parts of the world. The framework described in this paper also provides relevance to the review and adoption of analogous technologies in rail and other safety critical industries.

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Intelligent Transport System (ITS) technology is seen as a cost-effective way to increase the conspicuity of approaching trains and the effectiveness of train warnings at level crossings by providing an in-vehicle warning of an approaching train. The technology is often seen as a potential low-cost alternative to upgrading passive level crossings with traditional active warning systems (flashing lights and boom barriers). ITS platforms provide sensor, localization and dedicated short-range communication (DSRC) technologies to support cooperative applications such as collision avoidance for road vehicles. In recent years, in-vehicle warning systems based on ITS technology have been trialed at numerous locations around Australia, at level crossing sites with active and passive controls. While significant research has been conducted on the benefits of the technology in nominal operating modes, little research has focused on the effects of the failure modes, the human factors implications of unreliable warnings and the technology adoption process from the railway industry’s perspective. Many ITS technology suppliers originate from the road industry and often have limited awareness of the safety assurance requirements, operational requirements and legal obligations of railway operators. This paper aims to raise awareness of these issues and start a discussion on how such technology could be adopted. This paper will describe several ITS implementation cenarios and discuss failure modes, human factors considerations and the impact these scenarios are likely to have in terms of safety, railway safety assurance requirements and the practicability of meeting these requirements. The paper will identify the key obstacles impeding the adoption of ITS systems for the different implementation scenarios and a possible path forward towards the adoption of ITS technology.

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The occurrence of extreme water level events along low-lying, highly populated and/or developed coastlines can lead to devastating impacts on coastal infrastructure. Therefore it is very important that the probabilities of extreme water levels are accurately evaluated to inform flood and coastal management and for future planning. The aim of this study was to provide estimates of present day extreme total water level exceedance probabilities around the whole coastline of Australia, arising from combinations of mean sea level, astronomical tide and storm surges generated by both extra-tropical and tropical storms, but exclusive of surface gravity waves. The study has been undertaken in two main stages. In the first stage, a high-resolution (~10 km along the coast) hydrodynamic depth averaged model has been configured for the whole coastline of Australia using the Danish Hydraulics Institute’s Mike21 modelling suite of tools. The model has been forced with astronomical tidal levels, derived from the TPX07.2 global tidal model, and meteorological fields, from the US National Center for Environmental Prediction’s global reanalysis, to generate a 61-year (1949 to 2009) hindcast of water levels. This model output has been validated against measurements from 30 tide gauge sites around Australia with long records. At each of the model grid points located around the coast, time series of annual maxima and the several highest water levels for each year were derived from the multi-decadal water level hindcast and have been fitted to extreme value distributions to estimate exceedance probabilities. Stage 1 provided a reliable estimate of the present day total water level exceedance probabilities around southern Australia, which is mainly impacted by extra-tropical storms. However, as the meteorological fields used to force the hydrodynamic model only weakly include the effects of tropical cyclones the resultant water levels exceedance probabilities were underestimated around western, northern and north-eastern Australia at higher return periods. Even if the resolution of the meteorological forcing was adequate to represent tropical cyclone-induced surges, multi-decadal periods yielded insufficient instances of tropical cyclones to enable the use of traditional extreme value extrapolation techniques. Therefore, in the second stage of the study, a statistical model of tropical cyclone tracks and central pressures was developed using histroic observations. This model was then used to generate synthetic events that represented 10,000 years of cyclone activity for the Australia region, with characteristics based on the observed tropical cyclones over the last ~40 years. Wind and pressure fields, derived from these synthetic events using analytical profile models, were used to drive the hydrodynamic model to predict the associated storm surge response. A random time period was chosen, during the tropical cyclone season, and astronomical tidal forcing for this period was included to account for non-linear interactions between the tidal and surge components. For each model grid point around the coast, annual maximum total levels for these synthetic events were calculated and these were used to estimate exceedance probabilities. The exceedance probabilities from stages 1 and 2 were then combined to provide a single estimate of present day extreme water level probabilities around the whole coastline of Australia.

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Molecular doping and detection are at the forefront of graphene research, a topic of great interest in physical and materials science. Molecules adsorb strongly on graphene, leading to a change in electrical conductivity at room temperature. However, a common impediment for practical applications reported by all studies to date is the excessively slow rate of desorption of important reactive gases such as ammonia and nitrogen dioxide. Annealing at high temperatures, or exposure to strong ultraviolet light under vacuum, is employed to facilitate desorption of these gases. In this article, the molecules adsorbed on graphene nanoflakes and on chemically derived graphene-nanomesh flakes are displaced rapidly at room temperature in air by the use of gaseous polar molecules such as water and ethanol. The mechanism for desorption is proposed to arise from the electrostatic forces exerted by the polar molecules, which decouples the overlap between substrate defect states, molecule states, and graphene states near the Fermi level. Using chemiresistors prepared from water-based dispersions of single-layer graphene on mesoporous alumina membranes, the study further shows that the edges of the graphene flakes (showing p-type responses to NO2 and NH3) and the edges of graphene nanomesh structures (showing n-type responses to NO2 and NH3) have enhanced sensitivity. The measured responses towards gases are comparable to or better than those which have been obtained using devices that are more sophisticated. The higher sensitivity and rapid regeneration of the sensor at room temperature provides a clear advancement towards practical molecule detection using graphene-based materials.

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The potential impacts of extreme water level events on our coasts are increasing as populations grow and sea levels rise. To better prepare for the future, coastal engineers and managers need accurate estimates of average exceedance probabilities for extreme water levels. In this paper, we estimate present day probabilities of extreme water levels around the entire coastline of Australia. Tides and storm surges generated by extra-tropical storms were included by creating a 61-year (1949-2009) hindcast of water levels using a high resolution depth averaged hydrodynamic model driven with meteorological data from a global reanalysis. Tropical cyclone-induced surges were included through numerical modelling of a database of synthetic tropical cyclones equivalent to 10,000 years of cyclone activity around Australia. Predicted water level data was analysed using extreme value theory to construct return period curves for both the water level hindcast and synthetic tropical cyclone modelling. These return period curves were then combined by taking the highest water level at each return period.

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To date, designed topologies for DC-AC inversion with both voltage-buck and boost capabilities are mainly focused on two-level circuitries with extensions to three-level possibilities left nearly unexplored. Contributing to this area of research, this paper presents the design of a number of viable buck-boost three-level inverters that can also support bidirectional power conversion. The proposed front-end circuitry is developed from the Cuk-derived buck-boost two-level inverter, and by using the "alternative phase opposition disposition" (APOD) modulation scheme, the buck-boost three-level inverters can perform distinct five-level line voltage and three-level phase voltage switching by simply controlling the active switches located in the designed voltage boost section of the circuits. As a cost saving option, one active switch can further be removed from the voltage-boost section of the circuits by simply re-routing the gating commands of the remaining switches without influencing the ac output voltage amplitude. To verify the validity of the proposed inverters, Matlab/PLECS simulations were performed before a laboratory prototype was implemented for experimental testing.

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To date, designed topologies for DC-AC inversion with both voltage buck and boost capabilities are mainly focused on two-level circuitries with extensions to three-level possibilities left nearly unexplored. Contributing to this area of research, this paper presents the design of a number of viable buck-boost three-level inverters that can also support bidirectional power conversion. The proposed front-end circuitry is developed from the Cuk-derived buck-boost two-level inverter, and by using the ldquoalternative phase opposition dispositionrdquo modulation scheme, the buck-boost three-level inverters can perform distinct five-level line voltage and three-level phase voltage switching by simply controlling the active switches located in the designed voltage boost section of the circuits. As a cost saving option, one active switch can further be removed from the voltage boost section of the circuits by simply rerouting the gating commands of the remaining switches without influencing the AC output voltage amplitude. To verify the validity of the proposed inverters, MATLAB/PLECS simulations were performed before a laboratory prototype was implemented for experimental testing.

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This paper evaluates and proposes various compensation methods for three-level Z-source inverters under semiconductor-failure conditions. Unlike the fault-tolerant techniques used in traditional three-level inverters, where either an extra phase-leg or collective switching states are used, the proposed methods for three-level Z-source inverters simply reconfigure their relevant gating signals so as to ride-through the failed semiconductor conditions smoothly without any significant decrease in their ac-output quality and amplitude. These features are partly attributed to the inherent boost characteristics of a Z-source inverter, in addition to its usual voltage-buck operation. By focusing on specific types of three-level Z-source inverters, it can also be shown that, for the dual Z-source inverters, a unique feature accompanying it is its extra ability to force common-mode voltage to zero even under semiconductor-failure conditions. For verifying these described performance features, PLECS simulation and experimental testing were performed with some results captured and shown in a later section for visual confirmation.

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Results of experimental investigations on the relationship between nanoscale morphology of carbon doped hydrogenated silicon-oxide (SiOCH) low-k films and their electron spectrum of defect states are presented. The SiOCH films have been deposited using trimethylsilane (3MS) - oxygen mixture in a 13.56 MHz plasma enhanced chemical vapor deposition (PECVD) system at variable RF power densities (from 1.3 to 2.6 W/cm2) and gas pressures of 3, 4, and 5 Torr. The atomic structure of the SiOCH films is a mixture of amorphous-nanocrystalline SiO2-like and SiC-like phases. Results of the FTIR spectroscopy and atomic force microscopy suggest that the volume fraction of the SiC-like phase increases from ∼0.2 to 0.4 with RF power. The average size of the nanoscale surface morphology elements of the SiO2-like matrix can be controlled by the RF power density and source gas flow rates. Electron density of the defect states N(E) of the SiOCH films has been investigated with the DLTS technique in the energy range up to 0.6 eV from the bottom of the conduction band. Distinct N(E) peaks at 0.25 - 0.35 eV and 0.42 - 0.52 eV below the conduction band bottom have been observed. The first N(E) peak is identified as originated from E1-like centers in the SiC-like phase. The volume density of the defects can vary from 1011 - 1017 cm-3 depending on specific conditions of the PECVD process.

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This paper presents the design of a dual Z-source inverter that can be used with either a single dc source or two isolated dc sources. Unlike traditional inverters, the integration of a properly designed Z-source network and semiconductor switches to the proposed dual inverter allows buck-boost power conversion to be performed over a wide modulation range with three-level output waveforms generated. The connection of an additional transformer to the inverter ac output also allows all generic wye- or delta-connected loads with three-wire or four-wire configuration to be supplied by the inverter. Modulation-wise, the dual inverter can be controlled using a carefully designed carrier-based pulse-width modulation (PWM) scheme that always will ensure balanced voltage boosting of the Z-source network, while simultaneously achieving reduced common-mode switching. Because of the omission of dead-time delays in the dual inverter PWM scheme, its switched common-mode voltage can be completely eliminated, unlike in traditional inverters where narrow common-mode spikes are still generated. Under semiconductor failure conditions, the presented PWM schemes can easily be modified to allow the inverter to operate without interruption and for cases where two isolated sources are used, zero common-mode voltage can still be ensured. These theoretical findings together with the inverter practicality have been confirmed both in simulations using PSIM with Matlab/Simulink coupler and experimentally using a laboratory implemented inverter prototype.

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This paper presents the design of a dual Z-source inverter that can be used with either a single dc source or two isolated dc sources. Unlike traditional inverters, the integration of a properly designed Z-source network and semiconductor switches to the proposed dual inverter allows buck-boost power conversion to be performed over a wide modulation range, with three-level output waveforms generated. The connection of an additional transformer to the inverter ac output also allows all generic wye-or delta-connected loads with three-wire or four-wire configuration to be supplied by the inverter. Modulationwise, the dual inverter can be controlled using a carefully designed carrier-based pulsewidth-modulation (PWM) scheme that will always ensure balanced voltage boosting of the Z-source network while simultaneously achieving reduced common-mode switching. Because of the omission of dead-time delays in the dual-inverter PWM scheme, its switched common-mode voltage can be completely eliminated, unlike in traditional inverters, where narrow common-mode spikes are still generated. Under semiconductor failure conditions, the presented PWM schemes can easily be modified to allow the inverter to operate without interruption, and for cases where two isolated sources are used, zero common-mode voltage can still be ensured. These theoretical findings, together with the inverter practicality, have been confirmed in simulations both using PSIM with Matlab/Simulink coupler and experimentally using a laboratory-implemented inverter prototype.