212 resultados para NANOWIRE ARRAYS


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The formation of ordered arrays of molecules via self-assembly is a rapid, scalable route towards the realization of nanoscale architectures with tailored properties. In recent years, graphene has emerged as an appealing substrate for molecular self-assembly in two dimensions. Here, the first five years of progress in supramolecular organization on graphene are reviewed. The self-assembly process can vary depending on the type of graphene employed: epitaxial graphene, grown in situ on a metal surface, and non-epitaxial graphene, transferred onto an arbitrary substrate, can have different effects on the final structure. On epitaxial graphene, the process is sensitive to the interaction between the graphene and the substrate on which it is grown. In the case of graphene that strongly interacts with its substrate, such as graphene/Ru(0001), the inhomogeneous adsorption landscape of the graphene moiré superlattice provides a unique opportunity for guiding molecular organization, since molecules experience spatially constrained diffusion and adsorption. On weaker-interacting epitaxial graphene films, and on non-epitaxial graphene transferred onto a host substrate, self-assembly leads to films similar to those obtained on graphite surfaces. The efficacy of a graphene layer for facilitating planar adsorption of aromatic molecules has been repeatedly demonstrated, indicating that it can be used to direct molecular adsorption, and therefore carrier transport, in a certain orientation, and suggesting that the use of transferred graphene may allow for predictible molecular self-assembly on a wide range of surfaces.

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Tridiagonal diagonally dominant linear systems arise in many scientific and engineering applications. The standard Thomas algorithm for solving such systems is inherently serial forming a bottleneck in computation. Algorithms such as cyclic reduction and SPIKE reduce a single large tridiagonal system into multiple small independent systems which can be solved in parallel. We have developed portable cyclic reduction and SPIKE algorithm OpenCL implementations with the intent to target a range of co-processors in a heterogeneous computing environment including Field Programmable Gate Arrays (FPGAs), Graphics Processing Units (GPUs) and other multi-core processors. In this paper, we evaluate these designs in the context of solver performance, resource efficiency and numerical accuracy.