Simplified Mathematical Model for Effects of Freezing on the Low-Temperature Performance of the Lead-Acid Battery

Discharge periods of lead-acid batteries are significantly reduced at subzero centigrade temperatures. The reduction is more than what can he expected due to decreased rates of various processes caused by a lowering of temperature and occurs despite the fact that active materials are available for discharge. It is proposed that the major cause for this is the freezing of the electrolyte. The concentration of acid decreases during battery discharge with a consequent increase in the freezing temperature. A battery freezes when the discharge temperature falls below the freezing temperature. A mathematical model is developed for conditions where charge-transfer reaction is the rate-limiting step. and Tafel kinetics are applicable. It is argued that freezing begins from the midplanes of electrodes and proceeds toward the reservoir in-between. Ionic conduction stops when one of the electrodes freezes fully and the time taken to reach that point, namely the discharge period, is calculated. The predictions of the model compare well to observations made at low current density (C/5) and at -20 and -40 degrees C. At higher current densities, however, diffusional resistances become important and a more complicated moving boundary problem needs to be solved to predict the discharge periods. (C) 2009 The Electrochemical Society.

Modeling and analysis of energy quantization effects on single electron inverter performance

In this paper, for the first time, the effects of energy quantization on single electron transistor (SET) inverter performance are analyzed through analytical modeling and Monte Carlo simulations. It is shown that energy quantization mainly changes the Coulomb blockade region and drain current of SET devices and thus affects the noise margin, power dissipation, and the propagation delay of SET inverter. A new analytical model for the noise margin of SET inverter is proposed which includes the energy quantization effects. Using the noise margin as a metric, the robustness of SET inverter is studied against the effects of energy quantization. A compact expression is developed for a novel parameter quantization threshold which is introduced for the first time in this paper. Quantization threshold explicitly defines the maximum energy quantization that an SET inverter logic circuit can withstand before its noise margin falls below a specified tolerance level. It is found that SET inverter designed with CT:CG=1/3 (where CT and CG are tunnel junction and gate capacitances, respectively) offers maximum robustness against energy quantization.