4 resultados para Synchronous distance education

em Indian Institute of Science - Bangalore - Índia


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In this work, we propose a new organization for the last level shared cache of a rnulticore system. Our design is based on the observation that the Next-Use distance, measured in terms of intervening misses between the eviction of a line and its next use, for lines brought in by a given delinquent PC falls within a predictable range of values. We exploit this correlation to improve the performance of shared caches in multi-core architectures by proposing the NUcache organization.

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In this paper, the performance of distance relays when applied to transmission system equipped with shunt FACTS device, Static Synchronous Compensator (STATCOM) is described. The aim of the proposed study is to evaluate the performance of distance relays when STATCOM is incorporated at the mid point of transmission lines for voltage control. A detailed model of STATCOM and its control strategy is presented. The presence of these devices significantly affects apparent impedance seen by the distance relays due to their rapid response to different power system configurations. The distance relay is evaluated for different loading conditions and for different fault locations. The faults are created during various pre-fault loading conditions. The studies are performed on 400KV and 132KV systems and the results are presented. Simulation studies are carried out using transient simulation software, PSCAD/EMTDC.

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The effectiveness of the last-level shared cache is crucial to the performance of a multi-core system. In this paper, we observe and make use of the DelinquentPC - Next-Use characteristic to improve shared cache performance. We propose a new PC-centric cache organization, NUcache, for the shared last level cache of multi-cores. NUcache logically partitions the associative ways of a cache set into MainWays and DeliWays. While all lines have access to the MainWays, only lines brought in by a subset of delinquent PCs, selected by a PC selection mechanism, are allowed to enter the DeliWays. The PC selection mechanism is an intelligent cost-benefit analysis based algorithm that utilizes Next-Use information to select the set of PCs that can maximize the hits experienced in DeliWays. Performance evaluation reveals that NUcache improves the performance over a baseline design by 9.6%, 30% and 33% respectively for dual, quad and eight core workloads comprised of SPEC benchmarks. We also show that NUcache is more effective than other well-known cache-partitioning algorithms.

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This paper deals with line protection challenges experienced in system having substantial wind generation penetration. Two types of WTGU: Doubly Fed (DFIG) and Squirrel Cage (SCIG) Induction Generators are simulated and connected to grid with single circuit transmission line. The paper summarizes analytical investigations carried out on the impedance seen by distance relays by varying fault resistances and grid short circuit MVA, for the protection of such transmission lines during faults. The results are also compared with systems having conventional synchronous machine connected to the grid.