Direct Writing of Copper Film Patterns by Laser-Induced Decomposition of Copper Acetate

Direct writing of patterns is being widely attempted in the field of microelectronic circuit/device manufacture. Use of this technique eliminates the need for employing photolithographic process. Laser induced direct writing can be achieved by (i) Photochemical reaction [i] , (ii) Evaporation from target material [2], and (iii) decomposition.Micron size features of palladium and copper through decomposition of palladium acetate and copper formate respectively on quartz and silicon using Argon ion laser have been reported [3,4] .In this commuication we report a technique for both single line and large area depositon of copper through decomposition of copper acetate,(CH3COO)2Cu, on alumina substrates.Nd:YAG laser known for its reliability and low maintenance cost as compared to excimer and other gas lasers is used. This technique offers an attractive and economical alternative for manufacture of thin film microcircuits.

Polymer optoelectronic structures for retinal prosthesis

This commentary highlights the effectiveness of optoelectronic properties of polymer semiconductors based on recent results emerging from our laboratory, where these materials are explored as artificial receptors for interfacing with the visual systems. Organic semiconductors based polymer layers in contact with physiological media exhibit interesting photophysical features, which mimic certain natural photoreceptors, including those in the retina. The availability of such optoelectronic materials opens up a gateway to utilize these structures as neuronal interfaces for stimulating retinal ganglion cells. In a recently reported work entitled ``A polymer optoelectronic interface provides visual cues to a blind retina,'' we utilized a specific configuration of a polymer semiconductor device structure to elicit neuronal activity in a blind retina upon photoexcitation. The elicited neuronal signals were found to have several features that followed the optoelectronic response of the polymer film. More importantly, the polymer-induced retinal response resembled the natural response of the retina to photoexcitation. These observations open up a promising material alternative for artificial retina applications.

Thermal test method for high power three-phase grid-connected inverters

Semiconductor device junction temperatures are maintained within datasheet specified limits to avoid failure in power converters. Burn-in tests are used to ensure this. In inverters, thermal time constants can be large and burn-in tests are required to be performed over long durations of time. At higher power levels, besides increased production cost, the testing requires sources and loads that can handle high power. In this study, a novel method to test a high power three-phase grid-connected inverter is proposed. The method eliminates the need for high power sources and loads. Only energy corresponding to the losses is consumed. The test is done by circulating rated current within the three legs of the inverter. All the phase legs being loaded, the method can be used to test the inverter in both cases of a common or independent cooling arrangement for the inverter phase legs. Further, the method can be used with different inverter configurations - three- or four-wire and for different pulse width modulation (PWM) techniques. The method has been experimentally validated on a 24 kVA inverter for a four-wire configuration that uses sine-triangle PWM and a three-wire configuration that uses conventional space vector PWM.

Field-Effect and Frequency Dependent Transport in Semiconductor-Enriched Single-Wall Carbon Nanotube Network Device

The electrical and optical response of a field-effect device comprising a network of semiconductor-enriched single-wall carbon nanotubes, gated with sodium chloride solution is investigated. Field-effect is demonstrated in a device that uses facile fabrication techniques along with a small-ion as the gate electrolyte-and this is accomplished as a result of the semiconductor enhancement of the tubes. The optical transparency and electrical resistance of the device are modulated with gate voltage. A time-response study of the modulation of optical transparency and electrical resistance upon application of gate voltage suggests the percolative charge transport in the network. Also the ac response in the network is investigated as a function of frequency and temperature down to 5 K. An empirical relation between onset frequency and temperature is determined.

Efficient charge transfer and field-induced tunneling transport in hybrid composite device of organic semiconductor and cadmium telluride quantum dots

Temperature and photo-dependent current-voltage characteristics are investigated in thin film devices of a hybrid-composite comprising of organic semiconductor poly(3,4-ethylenedioxythiophene): polystyrenesulfonate (PEDOT: PSS) and cadmium telluride quantum dots (CdTe QDs). A detailed study of the charge injection mechanism in ITO/PEDOT: PSS-CdTe QDs/Al device exhibits a transition from direct tunneling to Fowler-Nordheim tunneling with increasing electric field due to formation of high barrier at the QD interface. In addition, the hybrid-composite exhibits a huge photoluminescence quenching compared to aboriginal CdTe QDs and high increment in photoconductivity (similar to 400%), which is attributed to the charge transfer phenomena. The effective barrier height (Phi(B) approximate to 0.68 eV) is estimated from the transition voltage and the possible origin of its variation with temperature and photo-illumination is discussed. (C) 2015 AIP Publishing LLC.

Pressure-induced first-order transition in layered crystalline semiconductor GeSe to a metallic phase

The electrical resistivity of layerd crystalline GeSe has been investigated up to a pressure of 100 kbar and down to liquid-nitrogen temperature by use of a Bridgman anvil device. A pressure-induced first-order phase transition has been observed in single-crystal GeSe near 6 GPa. The high-pressure phase is found to be quenchable and an x-ray diffraction study of the quenched material reveals that it has the face-centered-cubic structure. Resistivity measurements as a function of pressure and temperature suggest that the high-pressure phase is metallic.

Metal-insulator-semiconductor capacitors with bismuth oxide as insulator

Metal-insulator-semiconductor capacitors using aluminum Bi2O3 and silicon have been studied for varactor applications. Reactively sputtered Bi2O3 films which under suitable proportions of oxygen and argon and had high resistivity suitable for device applications showed a dielectric constant of 25. Journal of Applied Physics is copyrighted by The American Institute of Physics.

Chemically Programmed Ultrahigh Density Two-Dimensional Semiconductor Superlattice Array

Designing an ultrahigh density linear superlattice array consisting of periodic blocks of different semiconductors in the strong confinement regime via a direct synthetic route remains an unachieved challenge in nanotechnology. We report a general synthesis route for the formulation of a large-area ultrahigh density superlattice array that involves adjoining multiple units of ZnS rods by prolate US particles at the tips. A single one-dimensional wire is 300-500 nm long and consists of periodic quantum wells with a barrier width of 5 nm provided by ZnS and a well width of 1-2 nm provided by CdS, defining a superlattice structure. The synthesis route allows for tailoring of ultranarrow laserlike emissions (fwhm approximate to 125 meV) originating from strong interwell energy dispersion along with control of the width, pitch, and registry of the superlattice assembly. Such an exceptional high-density superlattice array could form the basis of ultrahigh density memories in addition to offering opportunities for technological advancement in conventional heterojunction-based device applications.

Impact of energy quantisation in single electron transistor island on hybrid complementary metal oxide semiconductor-single electron transistor integrated circuits

For the first time, the impact of energy quantisation in single electron transistor (SET) island on the performance of hybrid complementary metal oxide semiconductor (CMOS)-SET transistor circuits has been studied. It has been shown through simple analytical models that energy quantisation primarily increases the Coulomb Blockade area and Coulomb Blockade oscillation periodicity of the SET device and thus influences the performance of hybrid CMOS-SET circuits. A novel computer aided design (CAD) framework has been developed for hybrid CMOS-SET co-simulation, which uses Monte Carlo (MC) simulator for SET devices along with conventional SPICE for metal oxide semiconductor devices. Using this co-simulation framework, the effects of energy quantisation have been studied for some hybrid circuits, namely, SETMOS, multiband voltage filter and multiple valued logic circuits. Although energy quantisation immensely deteriorates the performance of the hybrid circuits, it has been shown that the performance degradation because of energy quantisation can be compensated by properly tuning the bias current of the current-biased SET devices within the hybrid CMOS-SET circuits. Although this study is primarily done by exhaustive MC simulation, effort has also been put to develop first-order compact model for SET that includes energy quantisation effects. Finally, it has been demonstrated that one can predict the SET behaviour under energy quantisation with reasonable accuracy by slightly modifying the existing SET compact models that are valid for metallic devices having continuous energy states.

Thin film amorphous semiconductor microwave switches

Microwave switches operating in the X band were designed and fabricated using amorphous chalcogenide semiconductors of composition GexTeyAsz. Threshold devices were shown to operate as microwave modulators at modulation frequencies of up to 100 MHz. No delay time was observed at the highest frequency although the modulation efficiency decreased above 10 MHz owing to the finite recovery time which was approximately 0.3 × 10−8s. The devices can also be used as variolossers, the insertion loss being 0.5 dB in the OFF state and increasing on switching from 5 dB at 1 mA device current to 18 dB at 100 mA.The behaviour of the threshold switches can be explained in terms of the formation of a conducting filament in the ON state with a constant current density of 2 × 104Acm−2 that is shunted by the device capacitance. The OFF state conductivity σ varies as ωn (0.5 < n < 1) which is characteristic of hopping in localized states. However, there was evidence of a decrease in n or a saturation of the conductivity at high frequencies.As a result of phase separation memory switches require no holding current in the ON state and may be used as novel latching semiconductor phase-shifters.

Effect of gate-drain/source overlap on the noise in 90 nm N-channel metal oxide semiconductor field effect transistors

In this paper, we have studied the effect of gate-drain/source overlap (LOV) on the drain channel noise and induced gate current noise (SIg) in 90 nm N-channel metal oxide semiconductor field effect transistors using process and device simulations. As the change in overlap affects the gate tunneling leakage current, its effect on shot noise component of SIg has been taken into consideration. It has been shown that “control over LOV” allows us to get better noise performance from the device, i.e., it allows us to reduce noise figure, for a given leakage current constraint. LOV in the range of 0–10 nm is recommended for the 90 nm gate length transistors, in order to get the best performance in radio frequency applications.

Device oriented statistical modeling method for process variability in 45nm analog CMOS technology

With the rapid scaling down of the semiconductor process technology, the process variation aware circuit design has become essential today. Several statistical models have been proposed to deal with the process variation. We propose an accurate BSIM model for handling variability in 45nm CMOS technology. The MOSFET is designed to meet the specification of low standby power technology of International Technology Roadmap for Semiconductors (ITRS).The process parameters variation of annealing temperature, oxide thickness, halo dose and title angle of halo implant are considered for the model development. One parameter variation at a time is considered for developing the model. The model validation is done by performance matching with device simulation results and reported error is less than 10%.© (2012) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.

Analysis of size quantization and temperature effects on the threshold voltage of thin silicon film double-gate metal-oxide-semiconductor field-effect transistor (MOSFET)

In this paper, we analyze the combined effects of size quantization and device temperature variations (T = 50K to 400 K) on the intrinsic carrier concentration (n(i)), electron concentration (n) and thereby on the threshold voltage (V-th) for thin silicon film (t(si) = 1 nm to 10 nm) based fully-depleted Double-Gate Silicon-on-Insulator MOSFETs. The threshold voltage (V-th) is defined as the gate voltage (V-g) at which the potential at the center of the channel (Phi(c)) begins to saturate (Phi(c) = Phi(c(sat))). It is shown that in the strong quantum confinement regime (t(si) <= 3nm), the effects of size quantization far over-ride the effects of temperature variations on the total change in band-gap (Delta E-g(eff)), intrinsic carrier concentration (n(i)), electron concentration (n), Phi(c(sat)) and the threshold voltage (V-th). On the other hand, for t(si) >= 4 nm, it is shown that size quantization effects recede with increasing t(si), while the effects of temperature variations become increasingly significant. Through detailed analysis, a physical model for the threshold voltage is presented both for the undoped and doped cases valid over a wide-range of device temperatures, silicon film thicknesses and substrate doping densities. Both in the undoped and doped cases, it is shown that the threshold voltage strongly depends on the channel charge density and that it is independent of incomplete ionization effects, at lower device temperatures. The results are compared with the published work available in literature, and it is shown that the present approach incorporates quantization and temperature effects over the entire temperature range. We also present an analytical model for V-th as a function of device temperature (T). (C) 2013 AIP Publishing LLC.

Controlling Light Absorption in Charge-Separating Core/Shell Semiconductor Nanocrystals

Semiconductor nanocrystals of different formulations have been extensively studied for use in thin-film photovoltaics. Materials used in such devices need to satisfy the stringent requirement of having large absorption cross sections. Hence, type-II semiconductor nanocrystals that are generally considered to be poor light absorbers have largely been ignored. In this article, we show that type-II semiconductor nanocrystals can be tailored to match the light-absorption abilities of other types of nanostructures as well as bulk semiconductors. We synthesize type-II ZnTe/CdS core/shell nanocrystals. This material is found to exhibit a tunable band gap as well as absorption cross sections that are comparable to (die. This result has significant implications for thin-film photovoltaics, where the use of type-II nanocrystals instead of pure semiconductors can improve charge separation while also providing a much needed handle to regulate device composition.

Organic device electrode fabricated by aluminum in nanopowder and bulk form and effect on device properties

Schottky barrier devices of metal/semiconductor/metal structure were fabricated using organic semiconductor polyaniline (PANI) and aluminium thin film cathode. Aluminium contacts were made by thermal evaporation technique using two different forms of metals (bulk and nanopowder). The structure and surface morphology of these films were investigated by X-ray diffraction, scanning electron microscopy, and atomic force microscopy. Grain size of the as-deposited films obtained by Scherrer's method, modified Williamson-Hall method, and SEM were found to be different. Current-voltage (I-V) characteristic of Schottky barrier device structure indicates that the calculated current density (J) for device fabricated from aluminium nanopowder is more than that from aluminium in bulk form.