A linear ramp control circuit using two LM 556 dual timers

A simple linear ramp control circuit, suitable for use with force-commutated thyrister circuits is discussed here. The circuit is based on only two IM 558 dual timer iCs, operating from a single 15 V supply. The reset terminals facilitate inhibition of the output of any stage. The use of this circuit in a thyristor chopper operating at 400 Hz 13 described.

ADC Static Characterization Using Nonlinear Ramp Signal

Static characteristics of an analog-to-digital converter (ADC) can be directly determined from the histogram-based quasi-static approach by measuring the ADC output when excited by an ideal ramp/triangular signal of sufficiently low frequency. This approach requires only a fraction of time compared to the conventional dc voltage test, is straightforward, is easy to implement, and, in principle, is an accepted method as per the revised IEEE 1057. However, the only drawback is that ramp signal sources are not ideal. Thus, the nonlinearity present in the ramp signal gets superimposed on the measured ADC characteristics, which renders them, as such, unusable. In recent years, some solutions have been proposed to alleviate this problem by devising means to eliminate the contribution of signal source nonlinearity. Alternatively, a straightforward step would be to get rid of the ramp signal nonlinearity before it is applied to the ADC. Driven by this logic, this paper describes a simple method about using a nonlinear ramp signal, but yet causing little influence on the measured ADC static characteristics. Such a thing is possible because even in a nonideal ramp, there exist regions or segments that are nearly linear. Therefore, the task, essentially, is to identify these near-linear regions in a given source and employ them to test the ADC, with a suitable amplitude to match the ADC full-scale voltage range. Implementation of this method reveals that a significant reduction in the influence of source nonlinearity can be achieved. Simulation and experimental results on 8- and 10-bit ADCs are presented to demonstrate its applicability.

A Proposal for Concurrent Estimation of Static and Dynamic Nonlinearity of ADC

Despite great advances in very large scale integrated-circuit design and manufacturing, performance of even the best available high-speed, high-resolution analog-to-digital converter (ADC) is known to deteriorate while acquiring fast-rising, high-frequency, and nonrepetitive waveforms. Waveform digitizers (ADCs) used in high-voltage impulse recordings and measurements are invariably subjected to such waveforms. Errors resulting from a lowered ADC performance can be unacceptably high, especially when higher accuracies have to be achieved (e.g., when part of a reference measuring system). Static and dynamic nonlinearities (estimated independently) are vital indices for evaluating performance and suitability of ADCs to be used in such environments. Typically, the estimation of static nonlinearity involves 10-12 h of time or more (for a 12-b ADC) and the acquisition of millions of samples at high input frequencies for dynamic characterization. ADCs with even higher resolution and faster sampling speeds will soon become available. So, there is a need to reduce testing time for evaluating these parameters. This paper proposes a novel and time-efficient method for the simultaneous estimation of static and dynamic nonlinearity from a single test. This is achieved by conceiving a test signal, comprised of a high-frequency sinusoid (which addresses dynamic assessment) modulated by a low-frequency ramp (relevant to the static part). Details of implementation and results on two digitizers are presented and compared with nonlinearities determined by the existing standardized approaches. Good agreement in results and time savings achievable indicates its suitability.

A Proposal for Concurrent Estimation of Static and Dynamic Nonlinearity of ADC

Despite great advances in very large scale integrated-circuit design and manufacturing, performance of even the best available high-speed, high-resolution analog-to-digital converter (ADC) is known to deteriorate while acquiring fast-rising, high-frequency, and nonrepetitive waveforms. Waveform digitizers (ADCs) used in high-voltage impulse recordings and measurements are invariably subjected to such waveforms. Errors resulting from a lowered ADC performance can be unacceptably high, especially when higher accuracies have to be achieved (e.g., when part of a reference measuring system). Static and dynamic nonlinearities (estimated independently) are vital indices for evaluating performance and suitability of ADCs to be used in such environments. Typically, the estimation of static nonlinearity involves 10-12 h of time or more (for a 12-b ADC) and the acquisition of millions of samples at high input frequencies for dynamic characterization. ADCs with even higher resolution and faster sampling speeds will soon become available. So, there is a need to reduce testing time for evaluating these parameters. This paper proposes a novel and time-efficient method for the simultaneous estimation of static and dynamic nonlinearity from a single test. This is achieved by conceiving a test signal, comprised of a high-frequency sinusoid (which addresses dynamic assessment) modulated by a low-frequency ramp (relevant to the static part). Details of implementation and results on two digitizers are presented and compared with nonlinearities determined by the existing standardized approaches. Good agreement in results and time savings achievable indicates its suitability.

A non-linear analogue-to-digital converter for linearization of transducer input-output relationships

Analogue and digital techniques for linearization of non-linear input-output relationship of transducers are briefly reviewed. The condition required for linearizing a non-linear function y = f(x) using a non-linear analogue-to-digital converter, is explained. A simple technique to construct a non-linear digital-to-analogue converter, based on ' segments of equal digital interval ' is described. The technique was used to build an N-DAC which can be employed in a successive approximation or counter-ramp type ADC to linearize the non-linear transfer function of a thermistor-resistor combination. The possibility of achieving an order of magnitude higher accuracy in the measurement of temperature is shown.

A simple firing delay control circuit for bridge converters

A simple ramp control firing circuit, suitable for use with fully controlled, line-commutated thyristor bridge circuits, is discussed here. This circuit uses very few components and generates the synchronized firing pulses in a simple way. It operates from a single 15 V Supply and has an inherent pulse inhibit facility. This circuit provides the synchronized firing pulses for both thyristors of the same limb in a bridge. To ensure reliability, wide triggering pulses are used, which are modulated to pass through the pulse transformers1 and demodulated before being fed to the thyristor gates. The use of throe such circuits only for a three-phase bridge is discussed.

A simple firing delay control circuit for bridge converters

A simple ramp control firing circuit, suitable for use with fully controlled, line-commutated thyristor bridge circuits, is discussed here. This circuit uses very few components and generates the synchronized firing pulses in a simple way. It operates from a single 15 V Supply and has an inherent pulse inhibit facility. This circuit provides the synchronized firing pulses for both thyristors of the same limb in a bridge. To ensure reliability, wide triggering pulses are used, which are modulated to pass through the pulse transformers1 and demodulated before being fed to the thyristor gates. The use of throe such circuits only for a three-phase bridge is discussed.

Experimental investigation of cowl shape and location on inlet characteristics at hypersonic Mach number

An experimental study is presented to show the effect of the cowl location and shape on the shock interaction phenomena in the inlet region for a 2D, planar scramjet inlet model. Investigations include schlieren visualization around the cowl region and heat transfer rate measurement inside the inlet chamber.Both regular and Mach reflections are observed when the forebody ramp shock reflects from the cowl plate. Mach stem heights of 3.3 mm and 4.1 mm are measured in 18.5 mm and 22.7 mm high inlet chambers respecively. Increased heat transfer rate is measured at the same location of chamber for cowls of longer lenghs is indicating additional mass flow recovery by the inlet.

Studies on Unsteady Shock Interactions Near a Generic Scramjet Inlet

An experimental and numerical study is presented to show the effect of cowl length and angle on the ramp/cowl shock interaction phenomena fora two-dimensional planar scramjet inlet model. Experiments areconducted in a hypersonic shock tunnel, at Mach 8, at four lengths of owl and three cowl angles. Investigations include schlieren flow Visualization near the cowl region and static pressure and heat transfer rate measurement inside the inlet chamber. Various ramp/cowl shock interaction processes resulted for different cowl configurations have been visualized using a high-speed camera. Edney type-II interference pattern is observed for 131 and 141-mm cowl lengths,whereas it is an Edney type-I interference pattern in case of a 151 mm cowl with all their typical features resulting because of the ramp/cowl shock interaction. Experiments with a cowl configuration other than 0deg show the flow to he established through the inlet because or the reduced contraction ratio. Heat transfer peaks can be observed for the10 and 20-deg cowl cases where flow through the inlet is found to be established. These may serve as the possible locations of fuel injection.

A Novel Opto Electro Mechanical Interrogation System for Measuring Wavelength Shifts in Fiber Bragg Grating (FBG) Sensors

Here, we describe a novel FBG interrogation system in which FBGs are used as both sensing and reference elements. The reference FBGs is bonded to a mechanical flexure system having a linear amplification of 1:3.5, which is actuated using a piezo-actuator by applying a 0-150V ramp. The lengths of the reference gratings decide the maximum strain that can be applied to the reference grating, which in turn decides that strain range which can be interrogated. The main advantages of the present system are the on-line measurement of the wavelength shifts, small size, good sensitivity, multiplexing capability and low cost.

Strong motion compatible source geometry

Strong motion array records are analyzed in this paper to identify and map the source zone of four past earthquakes. The source is represented as a sequence of double couples evolving as ramp functions, triggering at different instants, distributed in a region yet to be mapped. The known surface level ground motion time histories are treated as responses to the unknown double couples on the fault surface. The location, orientation, magnitude, and risetime of the double couples are found by minimizing the mean square error between analytical solution and instrumental data. Numerical results are presented for Chi-Chi, Imperial Valley, San Fernando, and Uttarakashi earthquakes. Results obtained are in good agreement with field investigations and those obtained from conventional finite fault source inversions.

ADC Static Nonlinearity Estimation Using Linearity Property of Sinewave

Prohibitive test time, nonuniformity of excitation, and signal nonlinearity are major concerns associated with employing dc, sine, and triangular/ramp signals, respectively, while determining static nonlinearity of analog-to-digital converters (ADCs) with high resolution (i.e., ten or more bits). Attempts to overcome these issues have been examined with some degree of success. This paper describes a novel method of estimating the ``true'' static nonlinearity of an ADC using a low-frequency sine signal (for example, less than 10 Hz) by employing the histogram-based approach. It is based on the well-known fact that the variation of a sine signal is ``reasonably linear'' when the angle is small, for example, in the range of +/- 5 degrees to +/- 7 degrees. In the proposed method, the ADC under test has to be ``fed'' with this ``linear'' portion of the sinewave. The presence of any harmonics and offset in input excitation makes this linear part of the sine signal marginally different compared with that of an ideal ramp signal of equal amplitude. However, since it is a sinusoid, this difference can be accurately determined and later compensated from the measured ADC output. Thus, the corrected ADC output will correspond to the true ADC static nonlinearity. The implementation of the proposed method is discussed along with experimental results for two 8-b ADCs and one 10-b ADC which are then compared with the static characteristics estimated by the conventional DC method.

Influence of growth parameters on the surface morphology and crystallinity of InSb epilayers grown by liquid phase epitaxy

Unintentionally doped homoepitaxial InSb films have been grown by liquid phase epitaxy employing ramp cooling and step cooling growth modes. The effect of growth temperature, degree of supercooling and growth duration on the surface morphology and crystallinity were investigated. The major surface features of the grown film like terracing, inclusions, meniscus lines, etc are presented step-by-step and a variety of methods devised to overcome such undesirable features are described in sufficient detail. The optimization of growth parameters have led to the growth of smooth and continuous films. From the detailed morphological, X-ray diffraction, scanning electron microscopic and Raman studies, a correlation between the surface morphology and crystallinity has been established.

Thermal cycling of Mg-MMCs

Creep resistant Mg alloy QE22 reinforced with maftec(R), saffil(R) or supertec(R) short fibres is cycled between room temperature and 308degreesC at different ramp rates in the longitudinal and transverse directions. From the careful analysis of the strain vs. temperature thermal cycling curves true material behaviour and artifacts from the dilatometer are deciphered. From this analysis true coefficient of thermal expansion and relaxation processes are deduced. Hysteresis at higher temperatures is attributed to the relaxation process, whereas hysteresis at low temperatures giving a tilt-ground shape to the thermal cycling curves is again an artifact due to the instrument. The change in ramp rate highlights this effect. Finally, the effect of thermal cycling on microstructure is examined.

Mutual inhibition and capacity sharing during parallel preparation of serial eye movements

Many common activities, like reading, scanning scenes, or searching for an inconspicuous item in a cluttered environment, entail serial movements of the eyes that shift the gaze from one object to another. Previous studies have shown that the primate brain is capable of programming sequential saccadic eye movements in parallel. Given that the onset of saccades directed to a target are unpredictable in individual trials, what prevents a saccade during parallel programming from being executed in the direction of the second target before execution of another saccade in the direction of the first target remains unclear. Using a computational model, here we demonstrate that sequential saccades inhibit each other and share the brain's limited processing resources (capacity) so that the planning of a saccade in the direction of the first target always finishes first. In this framework, the latency of a saccade increases linearly with the fraction of capacity allocated to the other saccade in the sequence, and exponentially with the duration of capacity sharing. Our study establishes a link between the dual-task paradigm and the ramp-to-threshold model of response time to identify a physiologically viable mechanism that preserves the serial order of saccades without compromising the speed of performance.