149 resultados para Power electronics

em Indian Institute of Science - Bangalore - Índia


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The educational kit was developed for power electronics and drives. The need and purpose of this kit is to train engineers with current technology of digital control in power electronics. The DSP is the natural choice as it is able to perform high speed calculations required in power electronics. The educational kit consists of a DSP platform using TI DSP TMS320C50 starter kit, an inverter and an induction machine-dc machine set. A set of experiments have been prepared so that DSP programming can be learned easily in a smooth fashion. Here the application presented is open loop V/F control of three phase induction using sine pulse width modulation technique.

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In the education of physical sciences, the role of the laboratory cannot be overemphasised. It is the laboratory exercises which enable the student to assimilate the theoretical basis, verify the same through bench-top experiments, and internalize the subject discipline to acquire mastery of the same. However the resources essential to put together such an environment is substantial. As a result, the students go through a curriculum which is wanting in this respect. This paper presents a low cost alternative to impart such an experience to the student aimed at the subject of switched mode power conversion. The resources are based on an open source circuit simulator (Sequel) developed at IIT Mumbai, and inexpensive construction kits developed at IISc Bangalore. The Sequel programme developed by IIT Mumbai, is a circuit simulation program under linux operating system distributed free of charge. The construction kits developed at IISc Bangalore, is fully documented for anyone to assemble these circuit which minimal equipment such as soldering iron, multimeter, power supply etc. This paper puts together a simple forward dc to dc converter as a vehicle to introduce the programming under sequel to evaluate the transient performance and small signal dynamic model of the same. Bench tests on the assembled construction kit may be done by the student for study of operation, transient performance and closed loop stability margins etc.

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An in-situ power monitoring technique for Dynamic Voltage and Threshold scaling (DVTS) systems is proposed which measures total power consumed by load circuit using sleep transistor acting as power sensor. Design details of power monitor are examined using simulation framework in UMC 90nm CMOS process. Experimental results of test chip fabricated in AMS 0.35µm CMOS process are presented. The test chip has variable activity between 0.05 and 0.5 and has PMOS VTH control through nWell contact. Maximum resolution obtained from power monitor is 0.25mV. Overhead of power monitor in terms of its power consumption is 0.244 mW (2.2% of total power of load circuit). Lastly, power monitor is used to demonstrate closed loop DVTS system. DVTS algorithm shows 46.3% power savings using in-situ power monitor.

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We determine the optimal allocation of power between the analog and digital sections of an RF receiver while meeting the BER constraint. Unlike conventional RF receiver designs, we treat the SNR at the output of the analog front end (SNRAD) as a design parameter rather than a specification to arrive at this optimal allocation. We first determine the relationship of the SNRAD to the resolution and operating frequency of the digital section. We then use power models for the analog and digital sections to solve the power minimization problem. As an example, we consider a 802.15.4 compliant low-IF receiver operating at 2.4 GHz in 0.13 μm technology with 1.2 V power supply. We find that the overall receiver power is minimized by having the analog front end provide an SNR of 1.3dB and the ADC and the digital section operate at 1-bit resolution with 18MHz sampling frequency while achieving a power dissipation of 7mW.

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Multilevel inverters are an attractive solution in the medium-voltage and high-power applications. However in the low-power range also it can be a better solution compared to two-level inverters, if MOSFETs are used as devices switching in the order of 100 kHz. The effect of clamping diodes in the diode-clamped multilevel inverters play an important role in determining its efficiency. Power loss introduced by the reverse recovery of MOSFET body diode prohibits the use of MOSFET in hard-switched inverter legs. A technique of avoiding reverse recovery loss of MOSFET body diode in a three-level neutral point clamped inverter is suggested. The use of multilevel inverters topology enables operation at high switching frequency without sacrificing efficiency. High switching frequency of operation reduces the output filter requirement, which in turn helps in reducing the size of the inverter. This study elaborates the trade-off analysis to quantify the suitability of multilevel inverters in the low-power applications. Advantages of using a MOSFET-based three-level diode-clamped inverter for a PM motor drive and UPS systems are discussed.

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High voltage power supplies for radar applications are investigated, which are subjected to pulsed load (125 kHz and 10% duty cycle) with stringent specifications (<0.01% regulation, efficiency>85%, droop<0.5 V/micro-sec.). As good regulation and stable operation requires the converter to be switched at much higher frequency than the pulse load frequency, transformer poses serious problems of insulation failure and higher losses. This paper proposes a methodology to tackle the problems associated with this type of application. Synchronization of converter switching with load pulses enables the converter to switch at half the load switching frequency. Low switching frequency helps in ensuring safety of HV transformer insulation and reduction of losses due to skin and proximity effect. Phase-modulated series resonant converter with ZVS is used as the power converter.

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Handling unbalanced and non-linear loads in a three-phase AC power supply has always been a difficult issue. This has been addressed in the literature by either using fast controllers in the fundamental rotating reference frame or using separate controllers in reference frames specific to the harmonics. In the former case, the controller needs to be fast and in the latter case, besides the need for many controllers, negative-sequence components need to be extracted from the measured signal. This study proposes a control scheme for harmonic and unbalance compensation of a three-phase uninterruptible power supply wherein the problems mentioned above are addressed. The control takes place in the fundamental positive-sequence reference frame using only a set of feedback and feed-forward compensators. The harmonic components are extracted by a process of frame transformations and used as feed-forward compensation terms in the positive-sequence fundamental reference frame. This study uses a method wherein the measured signal itself is used for fundamental negative-sequence compensation. As the feed-forward compensator handles the high-bandwidth components, the feedback compensator can be a simple low-bandwidth one. This control algorithm is explained and validated experimentally.

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Gate driver is an integral part of every power converter, drives the power semiconductor devices and also provides protection for the switches against short-circuit events and over-voltages during shut down. Gate drive card for IGBTs and MOSFETs with basic features can be designed easily by making use of discrete electronic components. Gate driver ICs provides attractive features in a single package, which improves reliability and reduces effort of design engineers. Either case needs one or more isolated power supplies to drive each power semiconductor devices and provide isolation to the control circuitry from the power circuit. The primary emphasis is then to provide simplified and compact isolated power supplies to the gate drive card with the requisite isolation strength and which consumes less space, and for providing thermal protection to the power semiconductor modules for 3-� 3 wire or 4 wire inverters.

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Handling unbalanced and non-linear loads in a three-phase AC power supply has always been a difficult issue. This has been addressed in the literature by either using fast controllers in the fundamental rotating reference frame or using separate controllers in reference frames specific to the harmonics. In the former case, the controller needs to be fast and in the latter case, besides the need for many controllers, negative-sequence components need to be extracted from the measured signal. This study proposes a control scheme for harmonic and unbalance compensation of a three-phase uninterruptible power supply wherein the problems mentioned above are addressed. The control takes place in the fundamental positive-sequence reference frame using only a set of feedback and feed-forward compensators. The harmonic components are extracted by a process of frame transformations and used as feed-forward compensation terms in the positive-sequence fundamental reference frame. This study uses a method wherein the measured signal itself is used for fundamental negative-sequence compensation. As the feed-forward compensator handles the high-bandwidth components, the feedback compensator can be a simple low-bandwidth one. This control algorithm is explained and validated experimentally.

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Handling unbalanced and non-linear loads in a three-phase AC power supply has always been a difficult issue. This has been addressed in the literature by either using fast controllers in the fundamental rotating reference frame or using separate controllers in reference frames specific to the harmonics. In the former case, the controller needs to be fast and in the lattercase, besides the need for many controllers, negative-sequence components need to be extracted from the measured signal.This study proposes a control scheme for harmonic and unbalance compensation of a three-phase uninterruptible power supply wherein the problems mentioned above are addressed. The control takes place in the fundamental positive-sequence reference frame using only a set of feedback and feed-forward compensators. The harmonic components are extracted by process of frame transformations and used as feed-forward compensation terms in the positive-sequence fundamental reference frame. This study uses a method wherein the measured signal itself is used for fundamental negative-sequence compensation. As the feed-forward compensator handles the high-bandwidth components, the feedback compensator can be a simple low-bandwidth one. This control algorithm is explained and validated experimentally.

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High voltage power supplies for radar applications are investigated, which are subjected to pulsed load (125 kHz and 10% duty cycle) with stringent specifications (<0.01% regulation, efficiency>85%, droop<0.5 V/micro-sec.). As good regulation and stable operation requires the converter to be switched at much higher frequency than the pulse load frequency, transformer poses serious problems of insulation failure and higher losses. Few converter topologies are proposed to tackle these problems. A study is made regarding the beat frequency oscillations that may exist with pulsed loading. It is illustrated with respect to the proposed converter topologies. Methods are proposed to eliminate or minimize these oscillations.

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Power converters burn-in test consumes large amount of energy, which increases the cost of testing, and certification, in medium and high power application. A simple test configuration to test a PWM rectifier induction motor drive, using a Doubly Fed Induction Machine (DFIM) to circulate power back to the grid for burn-in test is presented. The test configuration makes use of only one power electronic converter, which is the converter to be tested. The test method ensures soft synchronization of DFIM and Squirrel Cage Induction Machine (SCIM). A simple volt per hertz control of the drive is sufficient for conducting the test. To synchronize the DFIM with SCIM, the rotor terminal voltage of DFIM is measured and used as an indication of speed mismatch between DFIM and SCIM. The synchronization is done when the DFIM rotor voltage is at its minimum. Analysis of the DFIM characteristics confirms that such a test can be effectively performed with smooth start up and loading of the test setup. After synchronization is obtained, the speed command to SCIM is changed in order to load the setup in motoring or regenerative mode of operation. The experimental results are presented that validates the proposed test method.

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This paper presents an analysis and comparison between two circuit topologies of the 3-phase, 3-level unity power factor (Vienna) rectifier on the basis of packaging issues and semiconductor power losses. The analysis indicates the suitability of one particular circuit variant due to restrictions on switching frequency at higher power levels. A comparison is also done between hysteresis and carrier based PWM strategies for current control of the rectifier, along with experimental evaluation of the control strategies on a hardware prototype of the rectifier. The comparison indicates that the carrier based modulation strategy is better suited for use with higher order filters that are utilized in high power applications.